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MPC8536EBVTATH 数据表(PDF) 52 Page - Freescale Semiconductor, Inc |
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MPC8536EBVTATH 数据表(HTML) 52 Page - Freescale Semiconductor, Inc |
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52 / 128 page ![]() MPC8536E PowerQUICC™ III Integrated Processor Hardware Specifications, Rev. 2 Ethernet: Enhanced Three-Speed Ethernet (eTSEC), MII Management Freescale Semiconductor 52 Figure 25 shows the RGMII and RTBI AC timing and multiplexing diagrams. Figure 25. RGMII and RTBI AC Timing and Multiplexing Diagrams 2.9.2.7 RMII AC Timing Specifications This section describes the RMII transmit and receive AC timing specifications. 2.9.2.7.1 RMII Transmit AC Timing Specifications The RMII transmit AC timing specifications are in Table 36. Table 36. RMII Transmit AC Timing Specifications At recommended operating conditions with L/TVDD of 3.3 V ± 5%. Parameter/Condition Symbol 1 Min Typ Max Unit TSECn_TX_CLK clock period tRMT 15.0 20.0 25.0 ns TSECn_TX_CLK duty cycle tRMTH 35 50 65 % TSECn_TX_CLK peak-to-peak jitter tRMTJ — — 250 ps GTX_CLK tRGT tRGTH tSKRGT_TX TX_CTL TXD[8:5] TXD[7:4] TXD[9] TXERR TXD[4] TXEN TXD[3:0] (At Transmitter) TXD[8:5][3:0] TXD[7:4][3:0] TX_CLK (At PHY) RX_CTL RXD[8:5] RXD[7:4] RXD[9] RXERR RXD[4] RXDV RXD[3:0] RXD[8:5][3:0] RXD[7:4][3:0] RX_CLK (At PHY) tSKRGT_TX tSKRGT_RX tSKRGT_RX |
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