MPC8536EBVTATH datasheet(71/128 Pages) FREESCALE

部件名	MPC8536EBVTATH

功能描述	PowerQUICC??III Integrated Processor Hardware Specifications

PDF	128 Pages

Scroll/Zoom	100%

制造商	FREESCALE [Freescale Semiconductor, Inc]

网页	http://www.freescale.com

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enhanced Local Bus Controller (eLBC)

MPC8536E PowerQUICC™ III Integrated Processor Hardware Specifications, Rev. 2

Freescale Semiconductor

Figure 39 to Figure 42 show the local bus signals.

Figure 39. Local Bus Signals, Non-Special Signals Only (PLL Enabled)

NOTE

In PLL bypass mode, some signals are launched and captured on the opposite edge of

LCLK[n] to that used in PLL Enable Mode. In this mode, output signals are launched at the

falling edge of the LCLK[n] and inputs signals are captured at the rising edge of LCLK[n]

with the exception of LGTA/LUPWAIT (which is captured at the falling edge of the

LCLK[n]).

Output Signals:

LA[27:31]/LBCTL/LOE

tLBKHOV1

tLBKHOV2

tLBKHOV3

LSYNC_IN

Input Signals:

LAD[0:31]/LDP[0:3]

Output (Data) Signals:

LAD[0:31]/LDP[0:3]

Output (Address) Signal:

LAD[0:31]

LALE

tLBIXKH1

tLBIVKH1

tLBIVKH2

tLBIXKH2

tLBKHOX1

tLBKHOZ1

tLBKHOX2

tLBKHOZ2

Input Signal:

LGTA

tLBOTOT

tLBKHOZ2

tLBKHOX2

tLBKHOV4

UPM Mode Input Signal:

LUPWAIT

MPC8536EBVTATH 数据表(PDF) 71 Page - Freescale Semiconductor, Inc

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