ADT7462ACPZ-R7 datasheet(51/81 Pages) ONSEMI

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ADT7462

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When a GPIO pin is configured as an output, the

corresponding bit in the GPIO status register becomes

read/write. Setting this bit then asserts the GPIO output.

(Again, “asserted” can be high or low, depending on the

setting of the polarity bit.) The effect of a GPIO status

the corresponding bit in one of the GPIO mask registers.

When the pin is configured as an output, the

corresponding status bit is automatically masked to prevent

the data written to the status bit from causing an interrupt.

When configured as inputs, the GPIO pins can be connected

to external interrupt sources such as temperature sensors

with digital output.

EDO Circuitry

The ADT7462 has the added functionality that the

assertion of one of the four GPIOs (GPIO1 to GPIO4) can

be used to latch one of the two EDOs high or low. The

ADT7462 has two EDO event mask registers (0x37 and

0x38): one mask for each EDO. See Table 29 for an

explanation of event mask register functionality.

The polarity of the EDOs is set in the GPIO configuration

registers (0x09 and 0x0A).

Setting a polarity bit to 1 in one of the GPIO configuration

registers makes the corresponding GPIO pin active high.

Clearing the polarity bit to 0 makes it active low.

Figure 84. EDO Circuit

GPIO1

GPIO2

GPIO3

GPIO4

LATCH

EVENT

MASK

EDO (GPIO5)

EDO (GPIO6)

Bits [7:5] of each event mask register (0x37 and 0x38)

allow the EDO output to be driven high or low (depending

on the polarity bit of the configuration register) and latched

(depending on the EDO latch bit of the configuration

over/undervoltage, or a fan failure condition.

Table 29. EDO Control (Mask) Register 0x37 and Register 0x38

Bit 7:

Overvoltage/

Undervoltage

Bit 6: THERM

Bit 5: Fan Fail

Bit 3

Bit 2

Bit 1

Bit 0

Behavior: What Drives and

Latches Output X (G = GPIO)

0 = Drive Output X

G4 or G3 or G2 or G1

1 = Ignore Event

G4 or G3 or G2

G4 or G3 or G1

G4 or G3

G4 or G2 or G1

G4 or G2

G4 or G1

G3 or G2 or G1

G3 or G2

G3 or G1

G2 or G1

GPIO events ignored by Output X

Table 29 shows that any of the four designated GPIO pins

can be used to set or reset either one of the two EDO outputs.

Using this functionality, it is possible to have the

ADT7462 drive LEDs or signals based on rules. For

example, if a GPIO1 (power fail), a GPIO2 (overcurrent), or

an overtemperature condition occurs, EDO1 (power supply

fault LED) can be latched. This does not require software

handling and makes the part more autonomous.

Other Digital Inputs

The ADT7462 contains other specific digital inputs that

can be found on PC motherboards. These inputs can be

monitored and configured for actions to occur on their

assertion.

VR_HOT Inputs

Pin 25 and Pin 26 can be configured as VR_HOT inputs.

These are specific digital signals from the CPU voltage

regulator that indicate an overtemperature. On assertion of

these inputs, the relevant status bits are set in Thermal Status

Assertion of these inputs can also be used to boost the fans

to full speed, thus providing emergency cooling in the event

of VR overtemperature. This is set using Bit 3 (VRD1) and

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