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ADT7462ACPZ-R7 数据表(PDF) 60 Page - ON Semiconductor |
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ADT7462ACPZ-R7 数据表(HTML) 60 Page - ON Semiconductor |
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60 / 81 page ![]() ADT7462 http://onsemi.com 60 Table 31. Register 0x00 — Configuration Register 0 (Note 1) Bit Name R/W Description [5:0] #Bytes Block Read R/W These bits set the number of registers to be read in a block read. Default = 0x20. 6 VID Decoder R/W 0 = VR10 Decoding Spec; 1 = VR11 Decoding Spec. Default = 0. 7 SW Reset R/W Setting this bit to 1 restores all unlocked registers to their default values. Self−clearing. Write 0x6D to register 0x7B before setting this bit to get a software reset. Default = 0. 1. POR = 0x20, Lock = Y, SW Reset = Y. Table 32. Register 0x01 — Configuration Register 1 (Note 1) Bit Name R/W Description 0 Monitor R/W Setting this bit to 1 enables temperature and voltage measurements. When this bit is set to 0, temperature and voltage measurements are disabled. Default = 1. 1 Reserved R/W Reserved. Default = 0. 2 Reserved R/W Reserved. Default = 0. 3 ALERT Mode R/W This bit sets the ALERT mode in the ADT7462. 1 = comparator mode, 0 = SMBALERT mode (default). 4 Disable Fast Spin−Up R/W Setting this bit to 1 disables the fast spin−up (for two TACH pulses) for the fans. Instead, the fans spin up for the programmed fan startup timeout. Default = 0. 5 Setup Complete R/W Setting this bit to 1 tells the ADT7462 that setup is complete and that monitoring of all selected channels should begin. Default = 0. 6 Lock Write Once Logic 1 locks all limit values at their current settings. When this bit is set, all lockable registers become read−only and cannot be modified until the ADT7462 is powered down and powered up again. This prevents rogue programs, such as viruses, from modifying critical system limit settings. Lockable. 7 RDY R This bit is set to 1 to indicate that the ADT7462 is fully powered up and ready to start monitoring. 1. POR = 0x81, Lock = Y, SW Reset = Y. Table 33. Register 0x02 — Configuration Register 2 (Note 1) Bit Name R/W Description 0 FAST R/W In low frequency, PWM fan speed measurements are made once a second. Setting this bit to 1 increases the frequency of the fan speed measurements to 4 times a second. Default = 0. 1 Reserved R/W Reserved. Default = 0. 2 PWM Mode R/W This bit sets the PWM frequency mode. 0 = low frequency PWM; frequency programmable between 11 Hz and 88.2 Hz. Default = 35.3 Hz. 1 = high frequency mode, 22.5 kHz. 3 VRD1 Boost R/W Setting this bit to 0 causes the fans to go to full speed on assertion of VRD1. Default = 0. When this bit is set to 1, VRD1 assertions have no effect on the fan speed. 4 VRD2 Boost R/W Setting this bit to 0 causes the fans to go to full speed on assertion of VRD2. Default = 0. When this bit is set to 1, VRD2 assertions have no effect on the fan speed. 5 Fans Full Speed R/W Setting this bit to 1 drives the fans to full speed. Default = 0. [7:6] #TACH Pulses R/W In low frequency mode, the ADT7462 must pulse stretch to get an accurate fan speed measurement. The speed is always measured between the 2nd rising edge and one × TACH pulses later. This bit determines the last TACH pulse. Therefore, if the fan speed is to be measured between the second and fourth TACH pulse, 01 is written to these bits. x = 1 = 00 x = 2 = 01 x = 3 = 10 (default) x = 4 = 11 1. POR = 0x80, Lock = Y, SW Reset = Y. |
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