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ADT7462ACPZ-R7 数据表(PDF) 12 Page - ON Semiconductor

部件名 ADT7462ACPZ-R7
功能描述  Flexible Temperature, Voltage Monitor, and System Fan Controller
PDF  81 Pages
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制造商  ONSEMI [ON Semiconductor]
网页  http://www.onsemi.com
标志 ONSEMI - ON Semiconductor

ADT7462ACPZ-R7 数据表(HTML) 12 Page - ON Semiconductor

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ADT7462
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12
Configuration Option 3
Configuration Option 3 is used to monitor all the voltages
in the system for Processor 1 and Processor 2. Additional
pins can be configured for fan control, VIDs, or GPIOs, as
required. Features of Configuration Option 3 include the
following:
• Up to 13 different voltages monitored
• Three +12V
• +5V
• +3.3V
• +2.5V
• +1.8V
• Two +1.5V
• Two +1.2V (VCCP1, VCCP2)
• 0.9V
• VBATT
• One local and one remote temperature channels
• Up to three PWM drives and up to four TACH inputs
• RESET I/O
Figure 21 shows the pin configuration when Configuration
Option 3 is chosen.
Figure 21. Configuration Option 3
PIN 1
INDICATOR
1
TACH1
2
TACH2
3
TACH3
4
TACH4
5
VCC
6
GND
7
+12V1
8
+12V2
24
VCCP2
23
VCCP1
22
+12V3
21
+5V
20
SCSI_TERM2
19
+0.9V
18
D2–
17
D2+
ADT7462
TOP VIEW
(Not to Scale)
Table 4. Configuration Option 3
Pin
Function
Configuration Register
Bit Value
1†
TACH1
Pin Configuration Reg 1
Bit 4 = 1
2†
TACH2
Pin Configuration Reg 1
Bit 3 = 1
3†
TACH3
Pin Configuration Reg 1
Bit 2 = 1
4†
TACH4
Pin Configuration Reg 1
Bit 1 = 1
7
+12V1
Pin Configuration Reg 1
Bit 0 = 0
8
+12V2
Pin Configuration Reg 2
Bit 7 = 0
13
+3.3V
Pin Configuration Reg 2
Bit 6 = 0
15
+1.8V
Pin Configuration Reg 1
Bit 6 = 0
16
SCSI_
TERM1
Pin Configuration Reg 1
Bit 6 = 0
19
+0.9V
Pin Configuration Reg 1
Bit 5 = 0
20
SCSI_
TERM2
Pin Configuration Reg 1
Bit 5 = 0
21
+5V
Pin Configuration Reg 2
Bit 3 = 0
22
+12V3
Pin Configuration Reg 2
Bit 2 = 0
23
VCCP1
Pin Configuration Reg 2
Bits [1:0] = 00
24
VCCP2
Pin Configuration Reg 3
Bits [7:6] = 00
25
+1.2V
Pin Configuration Reg 3
Bits [5:4] = 01
26
VBATT
Pin Configuration Reg 3
Bits [3:2] = 00
27
CI
Pin Configuration Reg 3
Bit 1 = 1
28†
+1.5V/
GPIO7
Pin Configuration Reg 4
Bits [7:6] = 01
29
+1.5V/
GPIO8
Pin Configuration Reg 4
Bits [5:4] = 01
31†
PWM1
Pin Configuration Reg 4
Bit 3 = 1
32†
PWM2
Pin Configuration Reg 4
Bit 2 = 1
†If VIDs are selected, these pins are configured as VIDs. To
enable VIDs, set Bit 7 of Pin Configuration Register 1 (0x10) = 1.



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