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ADT7462ACPZ-R7 数据表(PDF) 26 Page - ON Semiconductor |
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ADT7462ACPZ-R7 数据表(HTML) 26 Page - ON Semiconductor |
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26 / 81 page ![]() ADT7462 http://onsemi.com 26 Status and Mask Registers and ALERT Status Registers Each measured temperature and voltage has an associated high and low limit. The measured values are compared with these programmable limits. The results of these comparisons are stored in the status registers. A Logic 0 in the status register represents an in−limit comparison, while a Logic 1 represents an out−of−limit comparison. Once a status bit is set, it remains set until the status register is read by the SMBus master. Once read, the status bit is cleared if the error condition has gone away. The status registers are duplicated to accommodate situations where there are two SMBus masters. If one master reads the host status registers and consequently clears them, the second master has no way of knowing what bits were set and what bits were cleared. The second SMBus master can read from the duplicate BMC status registers to determine which status bits were set. Table 19 is a list of the status registers and corresponding addresses. Table 19. Status Registers Register Name Host Address BMC Address Thermal Status Register 1 0xB8 0xC0 Thermal Status Register 2 0xB9 0xC1 Thermal Status Register 3 0xBA − Voltage Status Register 1 0xBB 0xC3 Voltage Status Register 2 0xBC 0xC4 Fan Status Register 1 0xBD 0xC5 Digital Status Register 1 0xBE 0xC6 GPIO Status Register 0xBF − ALERT Output The ADT7462 has an SMBus ALERT output that is asserted when one of the status bits is set. This is to alert the master that an out−of−limit measurement has taken place or that there is a fault on one of the fan channels. An ALERT is generated as a result of a status bit being set in any of the registers. Figure 38. ALERT and Status Bit Behavior HIGH LIMIT TEMPERATURE STICKY STATUS BIT TEMP BACK IN LIMIT (STATUS BIT STAYS SET) CLEARED ON READ (TEMP BELOW LIMIT) SMBALERT Figure 38 shows how the ALERT output and “sticky” status bits behave. When a limit is exceeded, the corresponding status bit is set to 1. The status bit remains set until the error condition goes away and the status register is read. The status bits are referred to as sticky because they remain set until read by software. This ensures that an out−of−limit event cannot be missed, if software is polling the device periodically. Note that the ALERT output remains low for the entire duration that a reading is out of limit and until the status register has been read. Mask Registers The user has the option of masking any of the individual status bits that generate an ALERT. This is achieved by setting the appropriate bit in the mask registers. The ALERT output is not asserted on the setting of a status bit if it has been masked. The status bit itself is not affected and continues to be set when an out−of−limit condition exists. Table 20 is a list of the mask registers and corresponding addresses. Table 20. Mask Registers Register Name Register Address Thermal Mask Register 1 0x30 Thermal Mask Register 2 0x31 Voltage Mask Register 1 0x32 Voltage Mask Register 2 0x33 Fan Mask Register 0x34 Digital Mask Register 0x35 GPIO Mask Register 0x36 Fan Control Fan Drive Using PWM Control The ADT7462 uses pulse−width modulation (PWM) to control fan speed. Control relies on varying the duty cycle (or on/off ratio) of a square wave applied to the fan to vary the fan speed. The advantage of using PWM control is that it uses a very simple external circuit. The specific circuit used depends upon the type of fan. There are three main fan types in use: 2−wire fans, 3−wire fans, and 4−wire fans. The 2−wire fan has only power and ground connections. The 3−wire fan has power and ground connections and a TACH output to indicate the speed of the fan. The 4−wire fan has power and ground connections, a TACH output, and a PWM input. The PWM input is connected directly to the PWM drive of the ADT7462 and is used to control the speed of the fans. For 2−wire and 3−wire fans, the low frequency PWM drive signal should be selected. For 4−wire fans, the high frequency PWM drive signal should be selected. Using the ADT7462 with 2−Wire Fans Figure 39 shows the most typical circuit used with a 2−wire fan and illustrates how a 2−wire fan can be connected to the ADT7462. The low frequency PWM mode must be selected when using a 2−wire fan. |
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