ADT7462ACPZ-R7 datasheet(31/81 Pages) ONSEMI

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ADT7462

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Fan Startup Timeout

To prevent false interrupts being generated as a fan spins

up (because it is below running speed), the ADT7462

includes a fan startup timeout function. During this time, the

ADT7462 looks for two TACH pulses. If two TACH pulses

are not detected, an interrupt is generated. Using

Configuration Register 1 (0x01), Bit 4, this functionality can

be changed to spinning the fans for a programmable time

instead of two TACH pulses.

The startup timeout for each PWM drive is programmed

by Bits [2:0] in the PWMx configuration registers.

PWM1 Configuration Register = Register 0x21

PWM2 Configuration Register = Register 0x22

PWM3 Configuration Register = Register 0x23

PWM4 Configuration Register = Register 0x24

Table 22. Fan Startup Timeout

Bit Code

Startup Timeout

000

No startup timeout

001

100 ms

010

250 ms

011

400 ms

100

667 ms

101

1 sec

110

2 sec

111

32 sec

PWM Logic State

The PWM outputs can be programmed high for 100%

duty cycle (non−inverted) or low for 100% duty cycle

(inverted). This is programmed for each PWM drive in the

PWMx Configuration Registers using the INV bit (Bit 4).

0 = Active high PWM outputs.

1 = Active low PWM outputs.

Low Frequency Mode PWM Drive Frequency

The PWM drive frequency can be adjusted for the

application. The ADT7462 supports both high frequency

and low frequency PWM. High or low frequency PWM

mode is selected in Register 0x02, Bit 2. In high frequency

mode, the PWM drive frequency is always 22.5 kHz and

cannot be changed. Register 0x25 and Register 0x26

configure the PWM frequency in low frequency mode for

PWM1 to PWM4.

PWM Drive Frequency 1 is set using Bits [4:2] of the PWM1

and PWM2 frequency register (0x25).

PWM Drive Frequency 2 is set using Bits [7:5] of the PWM1

and PWM2 frequency register (0x25).

PWM Drive Frequency 3 is set using Bits [4:2] of the PWM3

and PWM4 frequency register (0x26).

PWM Drive Frequency 4 is set using Bits [7:5] of the PWM3

and PWM4 frequency register (0x26).

Table 23. Low Frequency PWM Options

Bit Code

Frequency

000

11 Hz

001

14.7 Hz

010

22.1 Hz

011

29.4 Hz

100

35.3 Hz

101

44.1 Hz

110

58.8 Hz

111

88.2 Hz

Fan Speed Control

The ADT7462 controls fan speed using two different

modes: automatic and manual.

In automatic fan speed control mode, fan speed is

automatically varied with temperature and without CPU

intervention, after initial parameters are set up. The

advantage of this mode is that if the system hangs, the system

is protected from overheating. The automatic fan speed

control incorporates a feature called dynamic TMIN

calibration. This feature reduces the design effort required

to program the automatic fan speed control loop. For more

information on how to program the automatic fan speed

control loop and dynamic TMIN operation, see the

Programming the Automatic Fan Speed Control Loop

section.

In manual fan speed control mode, the ADT7462 allows

the duty cycle of any PWM output to be manually adjusted.

This is useful if the user wants to change fan speed in the

software or adjust PWM duty cycle output for test purposes.

Bits [7:5] of Register 0x21 to Register 0x24 (PWM

configuration registers) control the behavior of each PWM

output. Under manual control, each PWM output can be

manually updated by writing to Register 0xAA to Register

0xAD (PWM duty cycle registers).

Programming the PWM Current Duty Cycle Registers

The PWM current duty cycle registers are 8−bit registers

that allow the PWM duty cycle for each output to be set

anywhere from 0% to 100% in steps of 0.39%.

The value to be programmed into the PWMMIN register is

given by:

Value (decimal) = PWMMIN/0.39

Example 1: For a PWM duty cycle of 50%,

Value (decimal) = 50/0.39 = 128 decimal

Value = 128 decimal or 0x80

Example 2: For a PWM duty cycle of 33%,

Value (decimal) = 33/0.39 = 85 decimal

Value = 84 decimal or 0x54

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