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PIC16F720-E/ML 数据表(PDF) 28 Page - Microchip Technology |
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PIC16F720-E/ML 数据表(HTML) 28 Page - Microchip Technology |
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28 / 244 page  PIC16F/LF720/721 DS41430A-page 28 2010 Microchip Technology Inc. TABLE 3-1: STATUS BITS AND THEIR SIGNIFICANCE POR BOR TO PD Condition 0x 1 1 Power-on Reset or LDO Reset 0x 0 x Illegal, TO is set on POR 0x x 0 Illegal, PD is set on POR 10 1 1 Brown-out Reset 11 0 1 WDT Reset 11 0 0 WDT Wake-up 11 u u MCLR Reset during normal operation 11 1 0 MCLR Reset during Sleep or interrupt wake-up from Sleep TABLE 3-2: RESET CONDITION FOR SPECIAL REGISTERS(2) Condition Program Counter STATUS Register PCON Register Power-on Reset 0000h 0001 1xxx ---- --0x MCLR Reset during normal operation 0000h 000u uuuu ---- --uu MCLR Reset during Sleep 0000h 0001 0uuu ---- --uu WDT Reset 0000h 0000 1uuu ---- --uu WDT Wake-up PC + 1 uuu0 0uuu ---- --uu Brown-out Reset 0000h 0001 1uuu ---- --u0 Interrupt Wake-up from Sleep PC + 1(1) uuu1 0uuu ---- --uu Legend: u = unchanged, x = unknown, - = unimplemented bit, reads as ‘0’. Note 1: When the wake-up is due to an interrupt and Global Interrupt Enable bit (GIE) is set, the return address is pushed on the stack and PC is loaded with the interrupt vector (0004h) after execution of PC + 1. 2: If a Status bit is not implemented, that bit will be read as ‘0’. |
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