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PIC16F720-E/ML 数据表(PDF) 98 Page - Microchip Technology |
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PIC16F720-E/ML 数据表(HTML) 98 Page - Microchip Technology |
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98 / 244 page ![]() PIC16F/LF720/721 DS41430A-page 98 2010 Microchip Technology Inc. 13.5.2.1 T1G Pin Gate Operation The T1G pin is one source for Timer1 gate control. It can be used to supply an external source to the Timer1 gate circuitry. 13.5.2.2 Timer0 Overflow Gate Operation When Timer0 increments from FFh to 00h, a low-to- high pulse will automatically be generated and internally supplied to the Timer1 gate circuitry. 13.5.2.3 Timer2 Match Gate Operation The TMR2 register will increment until it matches the value in the PR2 register. On the very next increment cycle, TMR2 will be reset to 00h. When this Reset occurs, a low-to-high pulse will automatically be generated and internally supplied to the Timer1 gate circuitry. 13.5.2.4 Watchdog Overflow Gate Operation The Watchdog Timer oscillator, prescaler and counter will be automatically turned on when TMR1GE = 1 and T1GSS selects the WDT as a gate source for Timer1 (T1GSS = 11). TMR1ON does not factor into the oscil- lator, prescaler and counter enable. See Table 13-5. The PSA and PS bits of the OPTION register still control what time-out interval is selected. Changing the prescaler during operation may result in a spurious capture. Enabling the Watchdog Timer oscillator does not automatically enable a Watchdog Reset or Wake-up from Sleep upon counter overflow. As the gate signal coming from the WDT counter will generate different pulse widths depending on if the WDT is enabled, when the CLRWDT instruction is executed, and so on, Toggle mode must be used. A specific sequence is required to put the device into the correct state to capture the next WDT counter interval. Note: When using the WDT as a gate source for Timer1, operations that clear the Watchdog Timer (CLRWDT, SLEEP instructions) will affect the time interval being measured. This includes waking from Sleep. All other interrupts that might wake the device from Sleep should be disabled to prevent them from disturbing the measurement period. TABLE 13-5: WDT/TIMER1 GATE INTERACTION WDTE TMR1GE = 1 and T1GSS = 11 WDT Oscillator Enable WDT Reset Wake-up WDT Available for T1G Source 1 N YY Y N 1 Y YY Y Y 0 Y YN N Y 0 N NN N N |
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