PIC16F720-ESLASHML datasheet(47/244 Pages) MICROCHIP

47 / 244 page

 2010 Microchip Technology Inc.

DS41430A-page 47

PIC16F/LF720/721

6.0

I/O PORTS

There are as many as eighteen general purpose I/O

pins available. Depending on which peripherals are

enabled, some or all of the pins may not be available as

general purpose I/O. In general, when a peripheral is

enabled, the associated pin may not be used as a

general purpose I/O pin.

6.1

PORTA and the TRISA Registers

PORTA is a 8-bit wide, bidirectional port. The

corresponding

data

direction

TRISA

(Register 6-2). Setting a TRISA bit (= 1) will make the

corresponding PORTA pin an input (i.e., disable the

output driver). Clearing a TRISA bit (= 0) will make the

corresponding PORTA pin an output (i.e., enables

output driver and puts the contents of the output latch

on the selected pin). Example 6-1 shows how to

initialize PORTA.

Reading the PORTA register (Register 6-1) reads the

status of the pins, whereas writing to it will write to the

PORT latch. All write operations are read-modify-write

operations. Therefore, a write to a port implies that the

port pins are read, this value is modified and then

written to the PORT data latch.

The TRISA register (Register 6-2) controls the PORTA

pin output drivers, even when they are being used as

analog inputs. The user should ensure the bits in the

TRISA register are maintained set when using them as

analog inputs. I/O pins configured as analog input always

read ‘0’.

EXAMPLE 6-1:

INITIALIZING PORTA

6.1.1

WEAK PULL-UPS

Each

the

PORTA

pins

has

individually

configurable

internal

weak

pull-up.

Control

bits

WPUA<5:0> enable or disable each pull-up (see

turned off when the port pin is configured as an output.

All pull-ups are disabled on a Power-on Reset by the

RABPU bit of the OPTION register.

6.1.2

INTERRUPT-ON-CHANGE

All of the PORTA pins are individually configurable as

an interrupt-on-change pin. Control bits IOCA<5:0>

enable or disable the interrupt function for each pin

(see Register 6-6). The interrupt-on-change feature is

disabled on a Power-on Reset.

For enable interrupt-on-change pins, the present value

is compared with the old value latched on the last read

of PORTA to determine which bits have changed or

mismatched the old value. The ‘mismatch’ outputs of

the last read are OR’d together to set the PORTA

Change Interrupt Flag bit (RABIF) in the INTCON

The user, in the Interrupt Service Routine, clears the

interrupt by:

Any read or write of PORTA. This will end the

mismatch condition.

Clear the flag bit RABIF.

A mismatch condition will continue to set flag bit RABIF.

Reading or writing PORTA will end the mismatch

condition and allow flag bit RABIF to be cleared. The

latch holding the last read value is not affected by a

MCLR or Brown-out Reset. After these Resets, the

RABIF flag will continue to be set if a mismatch is

present.

Note:

The ANSELA register must be initialized

to configure an analog channel as a digital

input. Pins configured as analog inputs

will read ‘0’.

BANKSEL PORTA

;

CLRF

PORTA

;Init PORTA

BANKSEL ANSELA

;

CLRF

ANSELA

;digital I/O

BANKSEL TRISA

;

MOVLW

0Ch

;Set RA<3:2> as inputs

MOVWF

TRISA

;and set RA<5:4,1:0>

;as outputs

Note:

When a pin change occurs at the same

time as a read operation on PORTA, the

RABIF flag will always be set. If multiple

PORTA pins are configured for the inter-

rupt-on-change, the user may not be able

to identify which pin changed state.

PIC16F720-E/ML 数据表(PDF) 47 Page - Microchip Technology

PIC16F720-E/ML 数据表(HTML) 47 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载