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PIC16F720-E/ML 数据表(PDF) 79 Page - Microchip Technology |
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PIC16F720-E/ML 数据表(HTML) 79 Page - Microchip Technology |
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79 / 244 page ![]() 2010 Microchip Technology Inc. DS41430A-page 79 PIC16F/LF720/721 FIGURE 9-2: ANALOG-TO-DIGITAL CONVERSION TAD CYCLES 9.1.4 INTERRUPTS The ADC module allows for the ability to generate an interrupt upon completion of an Analog-to-Digital conversion. The ADC Interrupt Flag is the ADIF bit in the PIR1 register. The ADC Interrupt Enable is the ADIE bit in the PIE1 register. The ADIF bit must be cleared in software. This interrupt can be generated while the device is operating or while in Sleep. If the device is in Sleep, the interrupt will wake-up the device. Upon waking from Sleep, the next instruction following the SLEEP instruction is always executed. If the user is attempting to wake-up from Sleep and resume in-line code execution, the GIE and PEIE bits of the INTCON register must be disabled. If the GIE and PEIE bits of the INTCON register are enabled, execution will switch to the Interrupt Service Routine. Please refer to Section 9.1.4 “Interrupts” for more information. 9.2 ADC Operation 9.2.1 STARTING A CONVERSION To enable the ADC module, the ADON bit of the ADCON0 register must be set to a ‘1’. Setting the GO/ DONE bit of the ADCON0 register to a ‘1’ will start the Analog-to-Digital conversion. 9.2.2 COMPLETION OF A CONVERSION When the conversion is complete, the ADC module will: • Clear the GO/DONE bit • Set the ADIF Interrupt Flag bit • Update the ADRES register with new conversion result 9.2.3 TERMINATING A CONVERSION If a conversion must be terminated before completion, the GO/DONE bit can be cleared in software. The ADRES register will be updated with the partially com- plete Analog-to-Digital conversion sample. Incomplete bits will match the last bit converted. TAD1 TAD2 TAD3 TAD4 TAD5 TAD6 TAD7 TAD8 TAD9 Set GO/DONE bit Holding Capacitor is disconnected from Analog Input (typically 100 ns) b7 b6 b5 b4 b3 b2 b1 b0 TCY to TAD Conversion Starts ADRES register is loaded, GO/DONE bit is cleared, ADIF bit is set, Holding capacitor is connected to analog input TAD0 Note 1: The ADIF bit is set at the completion of every conversion, regardless of whether or not the ADC interrupt is enabled. 2: The ADC operates during Sleep only when the FRC oscillator is selected. Note: The GO/DONE bit should not be set in the same instruction that turns on the ADC. Refer to Section 9.2.6 “A/D Conversion Procedure”. Note: A device Reset forces all registers to their Reset state. Thus, the ADC module is turned off and any pending conversion is terminated. |
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