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PIC16F720-E/ML 数据表(PDF) 84 Page - Microchip Technology |
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PIC16F720-E/ML 数据表(HTML) 84 Page - Microchip Technology |
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84 / 244 page  PIC16F/LF720/721 DS41430A-page 84 2010 Microchip Technology Inc. FIGURE 9-3: ANALOG INPUT MODEL FIGURE 9-4: ADC TRANSFER FUNCTION Note 1: The reference voltage (VREF) has no effect on the equation, since it cancels itself out. 2: The charge holding capacitor (CHOLD) is not discharged after each conversion. 3: The maximum recommended impedance for analog sources is 10 k . This is required to meet the pin leakage specification. CPIN VA Rs ANx 5 pF VDD VT 0.6V VT 0.6V I LEAKAGE(1) RIC 1k Sampling Switch SS Rss CHOLD = 20 pF VSS 6V Sampling Switch, Typical 4V 2V 510 (k ) VDD Legend: CPIN VT I LEAKAGE RIC SS CHOLD = Input Capacitance = Threshold Voltage = Leakage current at the pin due to = Interconnect Resistance = Sampling Switch = Sample/Hold Capacitance various junctions Note 1: Refer to Section 23.0 “Electrical Specifications”. RSS = Resistance of Sampling Switch 15 20 FFh FEh FDh FCh 04h 03h 02h 01h 00h Full-Scale FBh 1 LSB ideal VSS Zero-Scale Transition VREF Transition 1 LSB ideal Full-Scale Range Analog Input Voltage |
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