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PIC16F720-E/ML 数据表(PDF) 55 Page - Microchip Technology |
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PIC16F720-E/ML 数据表(HTML) 55 Page - Microchip Technology |
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55 / 244 page  2010 Microchip Technology Inc. DS41430A-page 55 PIC16F/LF720/721 FIGURE 6-6: BLOCK DIAGRAM OF RA5 I/O Pin VDD VSS D Q CK Q D Q CK Q D Q CK Q D Q CK Q VDD D EN Q D EN Q Weak Data Bus WR WPUA RD WPUA RD PORTA WR PORTA WR TRISA RD TRISA WR IOCA RD IOCA To TMR1 or CLKIN INTOSC mode RD PORTA INTOSC mode RABPU Interrupt-on- Change Q3 TABLE 6-1: SUMMARY OF REGISTERS ASSOCIATED WITH PORTA Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Value on POR, BOR Value on all other Resets ADCON0 — — CHS3 CHS2 CHS1 CHS0 GO/DONE ADON --00 0000 --00 0000 ANSELA — — —ANSA4 — ANSA2 ANSA1 ANSA0 ---1 -111 ---1 -111 OPTION_REG RABPU INTEDG T0CS T0SE PSA PS2 PS1 PS0 1111 1111 1111 1111 PORTA — — RA5 RA4 RA3 RA2 RA1 RA0 --xx xxxx --xx xxxx TRISA — — TRISA5 TRISA4 — TRISA2 TRISA1 TRISA0 --11 -111 --11 -111 Legend: x = unknown, u = unchanged, – = unimplemented locations read as ‘0’. Shaded cells are not used by PORTA. |
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