数据搜索系统，热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

预览 PDF HTML

PIC16F720-E/ML 数据表(PDF) 93 Page - Microchip Technology

部件名 PIC16F720-E/ML
功能描述  20-Pin Flash Microcontrollers with nanoWatt XLP Technology
PDF  244 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  MICROCHIP [Microchip Technology]
网页  http://www.microchip.com
标志 MICROCHIP - Microchip Technology

PIC16F720-E/ML 数据表(HTML) 93 Page - Microchip Technology

Back Button PIC16F720-E/ML Datasheet HTML 89Page - Microchip Technology PIC16F720-E/ML Datasheet HTML 90Page - Microchip Technology PIC16F720-E/ML Datasheet HTML 91Page - Microchip Technology PIC16F720-E/ML Datasheet HTML 92Page - Microchip Technology PIC16F720-E/ML Datasheet HTML 93Page - Microchip Technology PIC16F720-E/ML Datasheet HTML 94Page - Microchip Technology PIC16F720-E/ML Datasheet HTML 95Page - Microchip Technology PIC16F720-E/ML Datasheet HTML 96Page - Microchip Technology PIC16F720-E/ML Datasheet HTML 97Page - Microchip Technology Next Button
Zoom Inzoom in Zoom Outzoom out
 93 / 244 page
background image
 2010 Microchip Technology Inc.
DS41430A-page 93
PIC16F/LF720/721
REGISTER 12-1:
OPTION_REG: OPTION REGISTER
R/W-1
R/W-1
R/W-1
R/W-1
R/W-1
R/W-1
R/W-1
R/W-1
RABPU
INTEDG
T0CS
T0SE
PSA
PS2
PS1
PS0
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
RABPU: PORTA or PORTB Pull-up Enable bit
1
= PORTA or PORTB pull-ups are disabled
0
= PORTA or PORTB pull-ups are enabled by individual PORT latch values
bit 6
INTEDG: Interrupt Edge Select bit
1
= Interrupt on rising edge of INT pin
0
= Interrupt on falling edge of INT pin
bit 5
T0CS: TMR0 Clock Source Select bit
1
= Transition on T0CKI pin
0
= Internal instruction cycle clock (FOSC/4)
bit 4
T0SE: TMR0 Source Edge Select bit
1
= Increment on high-to-low transition on T0CKI pin
0
= Increment on low-to-high transition on T0CKI pin
bit 3
PSA: Prescaler Assignment bit
1
= Prescaler is assigned to the WDT
0
= Prescaler is assigned to the Timer0 module
bit 2-0
PS<2:0>: Prescaler Rate Select bits
000
001
010
011
100
101
110
111
1 : 2
1 : 4
1 : 8
1 : 16
1 : 32
1 : 64
1 : 128
1 : 256
1 : 1
1 : 2
1 : 4
1 : 8
1 : 16
1 : 32
1 : 64
1 : 128
Bit Value
TMR0 Rate
WDT Rate
TABLE 12-1:
SUMMARY OF REGISTERS ASSOCIATED WITH TIMER0
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR, BOR
Value on
all other
Resets
INTCON
GIE
PEIE
TMR0IE
INTE
RABIE
TMR0IF
INTF
RABIF
0000 000x
0000 000x
OPTION_REG
RABPU
INTEDG
T0CS
T0SE
PSA
PS2
PS1
PS0
1111 1111
1111 1111
TMR0
Timer0 module Register
xxxx xxxx
uuuu uuuu
TRISA
—
—
TRISA5
TRISA4
—
TRISA2
TRISA1
TRISA0
--11 -111
--11 -111
Legend:
– = Unimplemented locations, read as ‘0’, u = unchanged, x = unknown. Shaded cells are not used by the Timer0 module.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com