L9803 datasheet(63/126 Pages) STMICROELECTRONICS

部件名	L9803

功能描述	Super smart power motor driver with 8-Bit MCU, RAM, EEPROM, ADC, WDG, Timers, PWM and H-bridge driver

PDF	126 Pages

Scroll/Zoom	100%

制造商	STMICROELECTRONICS [STMicroelectronics]

网页	http://www.st.com

标志

63 / 126 page

L9803

On-Chip Peripherals

63/126

Figure 29.

PWM Cycle

Note:

If the CYREG value is minor or equal than DUTYREG value, PWM output remains set. With

a DUTYREG value of 0000h, the PWM output is permanently at low level, no matter of the

value of CYREG. With a DUTYREG value of FFFFh, the PWM output is permanently at high

level.

Interrupt Request

The EN_INT bit in CONREG register must be set to enable the interrupt generation. When

the 16 bits of the counter roll-over CYCLEREG value, interrupt request is set.

The interrupt request is cleared when any of the PWM registers is written.

Figure 30.

PWM Generation

5.3.3

The PWM is associated with a 8-bit control registers, and with two 16-bit data registers,

each split in two 8-bit registers.

PWM CYCLE REGISTER LOW (CYREGL)

PWM1 Register Address: 0011h

PWM2 Register Address: 0019h

Read/Write

Reset Value: 0000 0000 (00h)

Counter

Counter is reset

OUT PWM = 1

Counter

= CYREG

OUT PWM = 0

When

= DUTYREG

Pulse Width Modulation cycle

COUNTER

CYREG

COMPARE

VALUE

000

PWM OUTPUT

(INTERNAL CLOCK) x Cyreg_value

value

Interrupt Generation

L9803 数据表(PDF) 63 Page - STMicroelectronics

L9803 数据表(HTML) 63 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载