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L9803 数据表(PDF) 48 Page - STMicroelectronics

部件名 L9803
功能描述  Super smart power motor driver with 8-Bit MCU, RAM, EEPROM, ADC, WDG, Timers, PWM and H-bridge driver
PDF  126 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

L9803 数据表(HTML) 48 Page - STMicroelectronics

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On-Chip Peripherals
L9803
48/126
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These registers are readable and writable and are not affected by the timer hardware. A
reset event changes the OCiR value to 8000h.
Timing resolution is one count of the free running counter: (fCPU/CC[1:0]).
Procedure
To use the output compare function, select the following in the CR2 register:
Set the OCiE bit if an output is needed then the OCMPi pin is dedicated to the
output compare i function.
Select the timer clock (CC[1:0]) (see Table 9: Clock Control Bits).
And select the following in the CR1 register:
Select the OLVLi bit to applied to the OCMPi pins after the match occurs.
Set the OCIE bit to generate an interrupt if it is needed.
When a match is found between OCRi register and CR register:
–OCFi bit is set.
–The OCMPi pin takes OLVLi bit value (OCMPi pin latch is forced low during reset).
A timer interrupt is generated if the OCIE bit is set in the CR1 register and the I bit
is cleared in the CC register (CC).
The OCRi register value required for a specific timing application can be calculated using
the following formula:
Where:
∆t
= Output compare period (in seconds)
fCPU
= CPU clock frequency (in Hz)
PRESC
= Timer prescaler factor (2, 4 or 8 depending on CC[1:0] bits,
see Table 9: Clock Control Bits)
If the timer clock is an external clock, the formula
is:
∆OCiR = ∆t · f
EXT
Where:
∆t
= Output compare period (in seconds)
f
EXT
= External timer clock frequency (in hertz)
Clearing the output compare interrupt request (i.e.clearing the OCFi bit) is done by:
1.
Reading the SR register while the OCFi bit is set.
2.
An access (read or write) to the OCiLR register.
MS Byte
LS Byte
OCiROCiHR
OCiLR
∆OCiR
∆tf
CPU
PRESC
-----------------------
=



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