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L9803 数据表(PDF) 36 Page - STMicroelectronics

部件名 L9803
功能描述  Super smart power motor driver with 8-Bit MCU, RAM, EEPROM, ADC, WDG, Timers, PWM and H-bridge driver
PDF  126 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

L9803 数据表(HTML) 36 Page - STMicroelectronics

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On-Chip Peripherals
L9803
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Table 6.
I/O Port Configurations
Note:
1
1. When the I/O port is in input configuration and the associated alternate function is
enabled as an output, reading the DR register will read the alternate function output status.
2
2. When the I/O port is in output configuration and the associated alternate function is
enabled as an input, the alternate function reads the pin status given by the DR register
content.
Caution:
The alternate function must not be activated as long as the pin is configured as input with
interrupt, in order to avoid generating spurious interrupts.
Warning:
The analog input voltage level must be within the limits
stated in the absolute maximum ratings.
The hardware implementation on each I/O port depends on the settings in the DDR and OR
registers and specific feature of the I/O port.Switching these I/O ports from one state to
another should be done in a sequence that prevents unwanted side effects. Recommended
safe transitions are illustrated in Figure 17. Other transitions are potentially risky and should
Hardware Configuration
CONFIGURATION
PAD
VDD
RPU
EXTERNAL INTERRUPT
POLARITY
DATA BUS
PULL-UP
INTERRUPT
DR REGISTER ACCESS
W
R
FROM
OTHER
PINS
SOURCE (eix)
SELECTION
DR
REGISTER
CONFIGURATION
ALTERNATE INPUT
NOT IMPLEMENTED IN
TRUE OPEN DRAIN
I/O PORTS
ANALOG INPUT
PAD
RPU
DATA BUS
DR
DR REGISTER ACCESS
R/W
VDD
ALTERNATE
ALTERNATE
ENABLE
OUTPUT
REGISTER
NOT IMPLEMENTED IN
TRUE OPEN DRAIN
I/O PORTS
PAD
RPU
DATA BUS
DR
DR REGISTER ACCESS
R/W
VDD
ALTERNATE
ALTERNATE
ENABLE
OUTPUT
REGISTER
NOT IMPLEMENTED IN
TRUE OPEN DRAIN
I/O PORTS



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