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FULLFLEX 数据表(PDF) 19 Page - Cypress Semiconductor |
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FULLFLEX 数据表(HTML) 19 Page - Cypress Semiconductor |
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19 / 52 page ![]() FullFlex Document Number: 38-06082 Rev. *K Page 19 of 52 Maximum Ratings Exceeding maximum ratings may impair the useful life of the device. User guidelines are not tested. Storage temperature............................... –65 °C to + 150 °C Ambient temperature with power applied .......................................... –55 °C to + 125 °C Supply voltage to ground potential ..............–0.5 V to + 4.1 V DC voltage applied to outputs in high Z State...................... –0.5 V to VDDIO + 0.5 V DC input voltage ............................... –0.5 V to VDDIO + 0.5 V Output current into outputs (LOW) ............................. 20 mA Static discharge voltage........................................... > 2200 V (JEDEC JESD8-6, JESD8-B) Latch-up current ..................................................... > 200 mA Operating Range Range Ambient Temperature VCORE Commercial 0 °C to +70 °C 1.8 V 100 mV 1.5 V 80 mV Industrial –40 °C to +85 °C 1.8 V 100 mV 1.5 V 80 mV Power Supply Requirements Min Typ Max LVTTL VDDIO 3.0 V 3.3 V 3.6 V 2.5 V LVCMOS VDDIO 2.3 V 2.5 V 2.7 V HSTL VDDIO 1.4 V 1.5 V 1.9 V 1.8 V LVCMOS VDDIO 1.7 V 1.8 V 1.9 V 3.3 V VTTL 3.0 V 3.3 V 3.6 V 2.5 V VTTL 2.3 V 2.5 V 2.7 V HSTL VREF 0.68 V 0.75 V 0.95 V Electrical Characteristics Over the Operating Range Parameter Description Configuration All Speed Bins Unit Min Typ Max VOH Output HIGH voltage (VDDIO = Min, IOH = –8 mA) LVTTL 2.4[40] –– V (VDDIO = Min, IOH = –4 mA) HSTL (DC)[41] VDDIO – 0.4[40] –– V (VDDIO = Min, IOH = –4 mA) HSTL (AC)[41] VDDIO – 0.5[40] –– V (VDDIO = Min, IOH = –6 mA) 2.5 V LVCMOS 1.7[40] –– V (VDDIO = Min, IOH = –4 mA) 1.8 V LVCMOS VDDIO – 0.45[40] –– V VOL Output HIGH voltage (VDDIO = Min, IOL = 8 mA) LVTTL – – 0.4[40] V (VDDIO = Min, IOL = 4 mA) HSTL(DC)[41] –– 0.4[40] V (VDDIO = Min, IOL = 4 mA) HSTL (AC)[41] –– 0.5[40] V (VDDIO = Min, IOL = 6 mA) 2.5 V LVCMOS – – 0.7[40] V (VDDIO = Min, IOL = 4 mA) 1.8 V LVCMOS – – 0.45[40] V VIH Input HIGH voltage LVTTL 2 – VDDIO + 0.3 V HSTL(DC)[41] VREF + 0.1 – VDDIO + 0.3 V 2.5 V LVCMOS 1.7 – V 1.8 V LVCMOS 0.65 × VDDIO – V VIL Input LOW voltage LVTTL –0.3 – 0.8 V HSTL(DC)[41] –0.3 – VREF – 0.1 V 2.5 V LVCMOS – – 0.7 V 1.8 V LVCMOS – – 0.35 × VDDIO V Notes 40. These parameters are met with VIM disabled. 41. The DC specifications are measured under steady state conditions. The AC specifications are measured while switching at speed. AC VIH/VIL in HSTL mode are measured with 1 V/ns input edge rates. [+] Feedback |
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