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LSM330DL 数据表(PDF) 29 Page - STMicroelectronics |
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LSM330DL 数据表(HTML) 29 Page - STMicroelectronics |
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29 / 54 page ![]() LSM330DL Registers description Doc ID 022018 Rev 1 29/54 7 Registers description The device contains a set of registers which are used to control its behavior and to retrieve acceleration, angular rate and temperature data. The register addresses, composed of 7 bits, are used to identify them and to write the data through the serial interface. 7.1 CTRL_REG1_A (20h) ODR<3:0> is used to set power mode and ODR selection. The following table gives the frequency for all combinations of ODR<3:0>. Table 19. CTRL_REG1_A register ODR3 ODR2 ODR1 ODR0 LPen Zen Yen Xen Table 20. CTRL_REG1_A description ODR3-0 Data rate selection. Default value: 0 (0000: power-down; Others: Refer to Table 21: Data rate configuration LPen Low-power mode enable. Default value: 0 (0: normal mode, 1: low-power mode) Zen Z-axis enable. Default value: 1 (0: Z-axis disabled; 1: Z-axis enabled) Yen Y-axis enable. Default value: 1 (0: Y-axis disabled; 1: Y-axis enabled) Xen X-axis enable. Default value: 1 (0: X-axis disabled; 1: X-axis enabled) Table 21. Data rate configuration ODR3 ODR2 ODR1 ODR0 Power mode selection 00 00Power-down mode 0 0 0 1 Normal / low-power mode (1 Hz) 0 0 1 0 Normal / low-power mode (10 Hz) 0 0 1 1 Normal / low-power mode (25 Hz) 0 1 0 0 Normal / low-power mode (50 Hz) 0 1 0 1 Normal / low-power mode (100 Hz) 0 1 1 0 Normal / low-power mode (200 Hz) 0 1 1 1 Normal / low-power mode (400 Hz) 10 00Low-power mode (1.620 kHz) 1 0 0 1 Normal (1.344 kHz) / low-power mode (5.376 kHz) |
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