LSM330DL datasheet(30/54 Pages) STMICROELECTRONICS

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Registers description

LSM330DL

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Doc ID 022018 Rev 1

7.2

CTRL_REG2_A (21h)

Table 22.

Operating mode selection

Operating mode

CTRL_REG1[3]

(LPen bit)

CTRL_REG4[3]

(HR bit)

BW [Hz]

Turn-on time

[ms]

Low-power mode

ODR/2

Normal mode

ODR/9

7/ODR

Table 23.

CTRL_REG2_A register

HPM1

HPM0

HPCF2

HPCF1

FDS

HPCLICK

HPIS2

HPIS1

Table 24.

CTRL_REG2_A description

HPM1 -HPM0

High-pass filter mode selection. Default value: 00

Refer to

Table 25: High-pass filter mode configuration

HPCF2 -

HPCF1

High-pass filter cutoff frequency selection

FDS

Filtered data selection. Default value: 0

(0: internal filter bypassed; 1: data from internal filter sent to output register and

FIFO)

HPCLICK

High-pass filter enabled for CLICK function

(0: filter bypassed; 1: filter enabled)

HPIS2

High-pass filter enabled for AOI function on interrupt 2,

(0: filter bypassed; 1: filter enabled)

HPIS1

High-pass filter enabled for AOI function on interrupt 1,

(0: filter bypassed; 1: filter enabled)

Table 25.

High-pass filter mode configuration

HPM1

HPM0

High-pass filter mode

Normal mode (reset reading HP_RESET_FILTER)

Reference signal for filtering

Normal mode

Autoreset on interrupt event

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