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ANSELA 数据表(PDF) 23 Page - Microchip Technology |
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ANSELA 数据表(HTML) 23 Page - Microchip Technology |
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23 / 222 page  2013 Microchip Technology Inc. DS22331A-page 23 MCP19111 Current Sense DC Gain Offset Voltage IDC_OFFSET 1.4 1.56 1.7 V Voltage for Zero Current VZC — 1.45 — V VZCCON = 0x80h Voltage Reference Adjustable VOUT Range VOUT_RANGE 0.5 — 3.6 VVOUT range with no external voltage divider VOUT Coarse Resolution VOUT_COARSE 10.8 15.8 25.8 mV VOUT Coarse Mid Set Point VOUT_COARSE_MID 1.85 2.04 2.25 V VOUT Fine Resolution VOUT_FINE —0.8 1 mV Output Overvoltage Adjustable Overvoltage Range OVRANGE 0 — 4.5 V Adjustable Overvoltage Mid Set Point OVMID 1.8 2 2.3 V Adjustable Overvoltage Resolution OVR — 15 — mV Output Under Voltage Adjustable Under Voltage Range UVRANGE 0 — 4.5 Adjustable Under Volt- age Mid Set Point UVMID 1.8 2 2.3 V Adjustable Under Voltage Resolution UVR — 15 — mV Remote Sense Differential Amplifier Closed Loop Voltage Gain AVOL 0.95 1 1.05 V/V Common Mode Range VCMR GND – 0.3 — VDD +1.0 V Note 1 Common Mode Reject Ratio CMRR — 57 — dB Differential Amplifier Offset VOS —40 — mV See Section 9.5 “Calibration Word 5” and Section 9.6 “Calibration Word 6” Compensation Minimum Zero Frequency FZERO_MIN —350 — Hz Maximum Zero Frequency FZERO_MAX — 35000 — Hz Minimum Error Amplifier Gain GEA_MIN —0 — dB Maximum Error Amplifier Gain GEA_MAX — 36.15 — dB 4.2 Electrical Characteristics (Continued) Electrical Specifications: Unless otherwise noted, VIN = 12V, VREF = 1.2V, FSW =300 kHz, TA =+25°C. Boldface specifications apply over the TA range of -40°C to +125°C. Parameter Symbol Min Typ Max Units Conditions Note 1: Ensured by design. Not production tested. 2: VDD-OUT is the voltage present at the VDD pin. VDD is the internally generated bias voltage. 3: This is the total source current for all GPIO pins combined. Individually, each pin can source a maximum of 25 mA. 4: PE1 = 0x00h, ABECON = 0x00h, ATSTCON = 0x80h, WPUGPA = 0x00h, WPUGPB = 0x00h, and SLEEP command issued to PIC core, see SECTION 16.0. |
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