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ANSELA 数据表(PDF) 18 Page - Microchip Technology |
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ANSELA 数据表(HTML) 18 Page - Microchip Technology |
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18 / 222 page ![]() MCP19111 DS22331A-page 18 2013 Microchip Technology Inc. 3.8 Protection Features 3.8.1 INPUT UNDER VOLTAGE LOCKOUT The input under voltage lockout (UVLO) threshold is configurable by the VINLVL register, Register 6-1. When the voltage at the VIN pin of the MCP19111 is below the configurable threshold, the PIR2<VINIF> flag will be set. This flag is cleared by hardware once the VIN voltage is greater than the configurable threshold. By enabling the global interrupts or polling the VINIF bit, the MCP19111 can be disabled when the VIN voltage is below the threshold. Some techniques that can be used to disable the switching of the MCP19111 while the VINIF flag is set include setting the ATSTCON<DVRDIS> bit, setting the reference voltage to 0V, setting the PE1<PUEN> bit, or setting the ATSTCON<HIDIS> and ATSTCON<LODIS> bits. 3.8.2 OUTPUT OVERCURRENT The MCP19111 senses the voltage drop across the high-side MOSFET to determine when an output over current (OC) exists. This voltage drop is configurable by the OCCON register (Register 6-2), and is measured when the high-side MOSFET is conducting. To avoid false OC events, leading edge blanking is applied to the measurements. The amount of blanking is controlled by the OCLEB<1:0> bits in the OCCON register. See Section 6.2 “Output Overcurrent” for more information. When the input voltage is greater than 20V or if the RDSON of the high-side MOSFET is such that the programmed overcurrent threshold does not produce acceptable peak overcurrent protection, an alternative method must be used to determine an overcurrent situation. An alternative technique can use the configurable output under voltage protection and the PE1<UVTEE> bit to quickly terminate switching when the output voltage drops because of an overcurrent event. 3.8.3 OUTPUT UNDER VOLTAGE When the output under voltage DAC is enabled by setting the ABECON<UVDCEN> bit, the voltage measured between the +VSEN and -VSEN pins is monitored and compared to the UV threshold controlled by the OUVCON register (Register 6-12). When the output voltage is below the threshold, the PIR2<UVIF> flag will be set. Once set, firmware can determine how the MCP19111 responds to the fault condition and it must clear the UVIF flag. By setting the PE1<UVTEE> bit, the HDRV and LDRV signals will be asserted low when the UVIF flag is set. The signals will remain low until the flag is cleared. 3.8.4 OUTPUT OVERVOLTAGE When the output overvoltage DAC is enabled by setting the ABECON<OVDCEN> bit, the voltage measured between the +VSEN and -VSEN pins is monitored and compared to the OV threshold controlled by the OOVCON register (Register 6-13). When the output voltage is above the threshold, the PIR2<OVIF> flag will be set. Once set, firmware can determine how the MCP19111 responds to the fault condition and it must clear the OVIF flag. By setting the PE1<OVTEE> bit, the HDRV and LDRV signals will be asserted low when the OVIF flag is set. The signals will remain low until the flag is cleared. Note 1: The UVLO DAC must be enabled by set- ting the VINLVL<UVLOEN> bit. 2: Interrupt flag bits are set when an inter- rupt condition occurs, regardless of the state of its corresponding enable bit or the Global Enable bit (GIE) of the INTCON register. Note 1: The OC DAC must be enabled by setting the OCCON<OCEN> bit. Note 1: The UV DAC must be enabled by setting the ABECON<UVDCEN> bit. 2: Interrupt flag bits are set when an inter- rupt condition occurs, regardless of the state of its corresponding enable bit or the Global Enable bit (GIE) of the INTCON register. 3: The output of the remote sense compar- ator is compared to the UV threshold. Therefore, the offset in this comparator should be considered when calculating the UV threshold. Note 1: The OV DAC must be enabled by setting the ABECON<UVDCEN> bit. 2: Interrupt flag bits are set when an inter- rupt condition occurs, regardless of the state of its corresponding enable bit or the Global Enable bit (GIE) of the INTCON register. 3: The output of the remote sense compar- ator is compared to the OV threshold. Therefore, the offset in this comparator should be considered when calculating the OV threshold. |
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