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ANSELA 数据表(PDF) 68 Page - Microchip Technology |
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ANSELA 数据表(HTML) 68 Page - Microchip Technology |
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68 / 222 page ![]() MCP19111 DS22331A-page 68 2013 Microchip Technology Inc. 11.1.1 READING PROGRAM MEMORY AS DATA There are two methods of accessing constants in pro- gram memory. The first method is to use tables of RETLW instructions. The second method is to set a Files Select Register (FSR) to point to the program memory. 11.1.1.1 RETLW Instruction The RETLW instruction can be used to provide access to tables of constants. The recommended way to create such a table is shown in Example 11-1. EXAMPLE 11-1: RETLW INSTRUCTION 11.1.1.2 Indirect Read with Files Select Register ( FSR) The program memory can be accessed as data by setting bit 7 of the FSRxH register and reading the matching INDFx register. The MOVIW instruction will place the lower 8 bits of the addressed word in the W register. Writes to the program memory cannot be performed via the INDF registers. Instructions that access the program memory via the FSR require one extra instruction cycle to complete. Example 11-2 demonstrates accessing the program memory via an FSR. The HIGH directive will set bit<7> if a label points to a location in program memory. EXAMPLE 11-2: ACCESSING PROGRAM MEMORY VIA FSR 11.2 Data Memory Organization The data memory (see Figure 11-1) is partitioned into four banks, which contain the General Purpose Registers (GPR) and the Special Function Registers (SFR). The Special Function Registers are located in the first 32 locations of each bank. Register locations 20h-7Fh in Bank 0, A0h-EFh in Bank 1 and 120h-16Fh in Bank 2 are General Purpose Registers, implemented as static RAM. All other RAM is unimplemented and returns ‘0’ when read. The RP<1:0> bits of the STATUS register are the bank select bits. To move values from one register to another register, the value must pass throught the W register. This means that for all register-to-register moves, two instruction cycles are required. The STATUS register, shown in Register 11-1, contains: • the arithmetic status of the ALU • the Reset status • the bank select bits for data memory (RAM) The STATUS register can be the destination for any instruction, like any other register. If the STATUS register is the destination for an instruction that affects the Z, DC or C bits, then the write to these three bits is disabled. These bits are set or cleared according to the device logic. Furthermore, the TO and PD bits are not writable. Therefore, the result of an instruction with the STATUS register as destination may be different than intended. constants RETLW DATA0 ;Index0 data RETLW DATA1 ;Index1 data RETLW DATA2 RETLW DATA3 my_function ;… LOTS OF CODE… MOVLW DATA_INDEX call constants ;… THE CONSTANT IS IN W constants RETLW DATA0 ;Index0 data RETLW DATA1 ;Index1 data RETLW DATA2 RETLW DATA3 my_function ;… LOTS OF CODE… MOVLW LOW constants MOVWF FSR1L MOVLW HIGH constants MOVWF FSR1H MOVIW 0[FSR1] ;THE PROGRAM MEMORY IS IN W RP1 RP0 00 -> Bank 0 is selected 01 -> Bank 1 is selected 10 -> Bank 2 is selected 11 -> Bank 3 is selected |
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