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ANSELA 数据表(PDF) 61 Page - Microchip Technology |
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ANSELA 数据表(HTML) 61 Page - Microchip Technology |
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61 / 222 page ![]() 2013 Microchip Technology Inc. DS22331A-page 61 MCP19111 9.5 Calibration Word 5 The DIFC<7:0> bits at memory location 2085h contain the offset voltage information for the output voltage difference amplifier. The value is an 8-bit two’s complement number that represents the number of the OVCCON counts needed to adjust for the differential amplifier offset. This value can be used to completely remove the differential amplifier offset. For example, the offset of the differential amplifier is measured to be -64 mV. Since one OVCCON count equals 16 mV, this represents 4 counts of the OVCCON register. Therefore, the value stored at location 2085h would be 0x84h, where the setting of the DIFC7 bit represents a negative number. REGISTER 9-5: CALWD5: CALIBRATION WORD 5 REGISTER U-0 U-0 U-0 U-0 U-0 U-0 — — — — — — bit 13 bit 8 R/P-1 R/P-1 R/P-1 R/P-1 R/P-1 R/P-1 R/P-1 R/P-1 DIFC7 DIFC6 DIFC5 DIFC4 DIFC3 DIFC2 DIFC1 DIFC0 bit 7 bit 0 Legend: R = Readable bit P = Programmable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 13-8 Unimplemented: Read as ‘0’ bit 7-0 DIFC<7:0>: OVCCON counts to adjust for differential amplifier offset calibration bits |
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