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ANSELA 数据表(PDF) 8 Page - Microchip Technology |
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ANSELA 数据表(HTML) 8 Page - Microchip Technology |
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8 / 222 page ![]() FIGURE 1-2: MCP19111 SYNCHRONOUS BUCK BLOCK DIAGRAM PHASE HDRV LDRV VIN VDD BOOT VIN VOUT VDAC AVDD LDO1 LDO2 Bias Gen BGAP UVLO 4 4 VZC 5 Slave Mode Master Mode VREGREF UV REF OV REF 8+5 8 8 VOUT VOUT VOUT OV UV BGAP Lo_on 4 AVDD VDD 5 OC Comp VIN DLY 4 LVL_SFT PIC CORE Debug MUX Lo_on OV UV VIN_OK OCFLAG A/D Mux VDR -ISEN +VSEN -VSEN +ISEN +ISEN -ISEN +VSEN -VSEN GND PGND I/O(Digital Signals) 15 I/O I/O 6 R 5R VDR DLY 4 4 3 To ADC CSDGEN bit dc current sense gain ac current sense gain |
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