STM32F303VC datasheet(24/133 Pages) STMICROELECTRONICS

24 / 133 page

Functional overview

STM32F302xx/STM32F303xx

24/133

Doc ID 023353 Rev 5

In debug mode, the advanced-control timer counter can be frozen and the PWM outputs

disabled to turn off any power switches driven by these outputs.

Many features are shared with those of the general-purpose TIM timers (described in

Section 3.16.2 using the same architecture, so the advanced-control timers can work

together with the TIM timers via the Timer Link feature for synchronization or event chaining.

3.16.2

General-purpose timers (TIM2, TIM3, TIM4, TIM15, TIM16, TIM17)

There are up to six synchronizable general-purpose timers embedded in the

STM32F302xx/STM32F303xx (see Table 3 for differences). Each general-purpose timer

can be used to generate PWM outputs, or act as a simple time base.

●

TIM2, 3, and TIM4

These are full-featured general-purpose timers:

–

TIM2 has a 32-bit auto-reload up/downcounter and 32-bit prescaler

–

TIM3 and 4 have 16-bit auto-reload up/downcounters and 16-bit prescalers.

These timers all feature 4 independent channels for input capture/output compare,

PWM or one-pulse mode output. They can work together, or with the other general-

purpose timers via the Timer Link feature for synchronization or event chaining.

The counters can be frozen in debug mode.

All have independent DMA request generation and support quadrature encoders.

●

TIM15, 16 and 17

These three timers general-purpose timers with mid-range features:

They have 16-bit auto-reload upcounters and 16-bit prescalers.

–

TIM15 has 2 channels and 1 complementary channel

–

TIM16 and TIM17 have 1 channel and 1 complementary channel

All channels can be used for input capture/output compare, PWM or one-pulse mode

output.

The timers can work together via the Timer Link feature for synchronization or event

chaining. The timers have independent DMA request generation.

The counters can be frozen in debug mode.

3.16.3

Basic timers (TIM6, TIM7)

These timers are mainly used for DAC trigger generation. They can also be used as a

generic 16-bit time base.

3.16.4

Independent watchdog (IWDG)

The independent watchdog is based on a 12-bit downcounter and 8-bit prescaler. It is

clocked from an independent 40 kHz internal RC and as it operates independently from the

main clock, it can operate in Stop and Standby modes. It can be used either as a watchdog

to reset the device when a problem occurs, or as a free running timer for application timeout

management. It is hardware or software configurable through the option bytes. The counter

can be frozen in debug mode.

STM32F303VC 数据表(PDF) 24 Page - STMicroelectronics

STM32F303VC 数据表(HTML) 24 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载