LSM9DS0 datasheet(33/74 Pages) STMICROELECTRONICS

33 / 74 page

DocID024763 Rev 2

33/74

LSM9DS0

Digital interfaces

some other function, it can hold the clock line, SCL LOW to force the transmitter into a wait

state. Data transfer only continues when the receiver is ready for another byte and releases

the data line. If a slave receiver doesn’t acknowledge the slave address (i.e. it is not able to

receive because it is performing some real-time function) the data line must be left HIGH by

the slave. The master can then abort the transfer. A LOW to HIGH transition on the SDA line

while the SCL line is HIGH is defined as a STOP condition. Each data transfer must be

terminated by the generation of a STOP (SP) condition.

In order to read multiple bytes, it is necessary to assert the most significant bit of the sub-

address field. In other words, SUB(7) must be equal to 1 while SUB(6-0) represents the

address of first register to be read.

In the presented communication format MAK is Master Acknowledge and NMAK is No

Master Acknowledge.

Default address:

The SDO/SA0 pins (SDO_XM/SA0_XM or SDO_G/SA0_G) can be used to modify the least

significant bit of the device address. If the SA0 pin is connected to the voltage supply, LSb is

‘1’ (ex. address 0011101b) else if SA0 pad is connected to ground, the LSb value is ‘0’ (ex.

address 0011110b).

The slave address is completed with a Read/Write bit. If the bit was ‘1’ (Read), a repeated

START (SR) condition will have to be issued after the two sub-address bytes; if the bit is ‘0’

(Write) the master will transmit to the slave with the direction unchanged. Table 15 and

Table 16 explain how the SAD+Read/Write bit pattern is composed, listing all the possible

configurations.

Linear acceleration and magnetic sensor address:

Angular rate sensor address:

Table 15. Linear acceleration and magnetic sensor SAD+read/write patterns

Command

SDO_XM/SA0_XM pin

SAD[6:2]

SAD[1:0]

R/W

SAD+R/W

Read

00111

00111101 (3D)

Write

00111

00111100 (3C)

Read

00111

00111011 (3B)

Write

00111

00111010 (3A)

Table 16. Angular rate SAD+read/write patterns

Command

SAD[6:1]

SAD[0] = SDO_G/SA0_G pin

R/W

SAD+R/W

Read

110101

11010101 (D5h)

Write

110101

11010100 (D4h)

Read

110101

11010111 (D7h)

Write

110101

11010110 (D6h)

LSM9DS0 数据表(PDF) 33 Page - STMicroelectronics

LSM9DS0 数据表(HTML) 33 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74

数据表下载

链接网址

LSM9DS0 数据表(PDF) 33 Page - STMicroelectronics

LSM9DS0 数据表(HTML) 33 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74

数据表 下载

链接网址

数据表下载