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EPF10K100 数据表(PDF) 88 Page - Altera Corporation |
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EPF10K100 数据表(HTML) 88 Page - Altera Corporation |
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88 / 128 page ![]() 88 Altera Corporation FLEX 10K Embedded Programmable Logic Device Family Data Sheet Notes to tables: (1) All timing parameters are described in Tables 32 through 38 in this data sheet. (2) Using an LE to register the signal may provide a lower setup time. (3) This parameter is specified by characterization. (4) This parameter is measured without the use of the ClockLock or ClockBoost circuits. (5) This parameter is measured with the use of the ClockLock or ClockBoost circuits. Table 69. EPF10K100 Device External Timing Parameters Note (1) Symbol -3DX Speed Grade -3 Speed Grade -4 Speed Grade Unit MinMax MinMax MinMax tDRR 19.1 19.1 24.2 ns tINSU (2), (3), (4) 7.8 7.8 8.5 ns tOUTCO (3), (4) 2.0 11.1 2.0 11.1 2.0 14.3 ns tINH (3) 0.0 0.0 0.0 ns tINSU (2), (3), (5) 6.2 – – ns tOUTCO (3), (5) 2.0 6.7 – – ns Table 70. EPF10K100 Device External Bidirectional Timing Parameters Note (1) Symbol -3DX Speed Grade -3 Speed Grade -4 Speed Grade Unit Min Max Min Max Min Max tINSUBIDIR (4) 8.1 8.1 10.4 ns tINHBIDIR (4) 0.0 0.0 0.0 ns tOUTCOBIDIR (4) 2.0 11.1 2.0 11.1 2.0 14.3 ns tXZBIDIR (4) 15.3 15.3 18.4 ns tZXBIDIR (4) 15.3 15.3 18.4 ns tINSUBIDIR (5) 9.1–– ns tINHBIDIR (5) 0.0–– ns tOUTCOBIDIR (5) 2.0 7.2 – – – – ns tXZBIDIR (5) 14.3 – – ns tZXBIDIR (5) 14.3 – – ns |
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