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EPF10K100 数据表(PDF) 18 Page - Altera Corporation

部件名 EPF10K100
功能描述  Embedded Programmable Logic Device Family
PDF  128 Pages
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制造商  ALTERA [Altera Corporation]
网页  http://www.altera.com
标志 ALTERA - Altera Corporation

EPF10K100 数据表(HTML) 18 Page - Altera Corporation

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Altera Corporation
FLEX 10K Embedded Programmable Logic Device Family Data Sheet
LE Operating Modes
The FLEX 10K LE can operate in the following four modes:
Normal mode
Arithmetic mode
Up/down counter mode
Clearable counter mode
Each of these modes uses LE resources differently. In each mode, seven
available inputs to the LE—the four data inputs from the LAB local
interconnect, the feedback from the programmable register, and the
carry-in and cascade-in from the previous LE—are directed to different
destinations to implement the desired logic function. Three inputs to the
LE provide clock, clear, and preset control for the register. The Altera
software, in conjunction with parameterized functions such as LPM and
DesignWare functions, automatically chooses the appropriate mode for
common functions such as counters, adders, and multipliers. If required,
the designer can also create special-purpose functions which use a specific
LE operating mode for optimal performance.
The architecture provides a synchronous clock enable to the register in all
four modes. The Altera software can set DATA1 to enable the register
synchronously, providing easy implementation of fully synchronous
designs.
Figure 9 shows the LE operating modes.



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