EPF10K100 datasheet(41/128 Pages) ALTERA

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Altera Corporation

FLEX 10K Embedded Programmable Logic Device Family Data Sheet

The instruction register length of FLEX 10K devices is 10 bits. The

USERCODE register length in FLEX 10K devices is 32 bits; 7 bits are

determined by the user, and 25 bits are predetermined. Tables 14 and 15

show the boundary-scan register length and device IDCODE information

for FLEX 10K devices.

Table 13. FLEX 10K JTAG Instructions

JTAG Instruction

Description

SAMPLE/PRELOAD

Allows a snapshot of signals at the device pins to be captured and examined during

normal device operation, and permits an initial data pattern output at the device pins.

EXTEST

Allows the external circuitry and board-level interconnections to be tested by forcing a

test pattern at the output pins and capturing test results at the input pins.

BYPASS

Places the 1-bit bypass register between the TDI and TDO pins, which allows the BST

data to pass synchronously through a selected device to adjacent devices during normal

device operation.

USERCODE

Selects the user electronic signature (USERCODE) register and places it between the

TDI

and TDO pins, allowing the USERCODE to be serially shifted out of TDO.

IDCODE

Selects the IDCODE register and places it between TDI and TDO, allowing the IDCODE

to be serially shifted out of TDO.

ICR Instructions

These instructions are used when configuring a FLEX 10K device via JTAG ports with a

BitBlaster, or ByteBlasterMV or MasterBlaster download cable, or using a Jam File

(.jam) or Jam Byte-Code File (.jbc) via an embedded processor.

Table 14. FLEX 10K Boundary-Scan Register Length

Device

Boundary-Scan

EPF10K10, EPF10K10A

480

EPF10K20

624

EPF10K30, EPF10K30A

768

EPF10K40

864

EPF10K50, EPF10K50V

960

EPF10K70

1,104

EPF10K100, EPF10K100A

1,248

EPF10K130V

1,440

EPF10K250A

1,440

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