AD9852ASQZ datasheet(42/52 Pages) AD

42 / 52 page

AD9852

Rev. E | Page 42 of 52

Programming

If a PC and Analog Devices software are not used to program

the AD9852, the W9, W11, W12, W13, W14, and W15 headers

should be opened (shorting jumpers removed). This effectively

detaches the PC interface and allows J10 (the 40-pin header) and J1

to assume control without bus contention. Input signals on J10

and J1 going to the AD9852 should be 3.3 V CMOS logic levels.

Low-Pass Filter Testing

The purpose of the 2-pin W7 and W10 headers (associated with

J4 and J5) is to allow the two 50 Ω, 120 MHz filters to be tested

during PCB assembly without interference from other circuitry

attached to the filter inputs. Normally, a shorting jumper is attached

to each header to allow the DAC signals to be routed to the filters.

If the user wishes to test the filters, the shorting jumpers at W7 and

W10 should be removed and 50 Ω test signals should be applied at

the J4 and J5 inputs to the 50 Ω elliptic filters. The user can refer to

the provided schematic (Figure 61 and Figure 62) and the

following sections to properly position the remaining shorting

jumpers.

Observing the Unfiltered IOUT1 and the Unfiltered

IOUT2 DAC Signals

The unfiltered DAC outputs can be observed at J5 (the I, or

cosine DAC, signal) and J4 (the Q, or control DAC, signal). Use

the following procedure to route the two 50 Ω terminated analog

DAC outputs to the SMB connectors and to disconnect any other

circuitry.

Install shorting jumpers at W7 and W10.

Remove the shorting jumper at W16.

Remove the shorting jumper from the 3-pin W1 header.

Install a shorting jumper on Pin 1 and Pin 2 (bottom two

pins) of the 3-pin W4 header.

The raw DAC outputs may appear as a series of quantized

(stepped) output levels that do not resemble a sine wave until

they are filtered. The default 10 mA output current develops a

0.5 V p-p signal across the on-board 50 Ω termination. If the

observation equipment uses 50 Ω inputs, the DAC develops

only 0.25 V p-p due to the double termination.

If using the AD9852 evaluation board, the user can control

IOUT2 (the control DAC output) by using the serial or parallel

ports. The 12-bit, twos complement value(s) is/are written to

the control DAC register that sets the IOUT2 output to a static

dc level. Allowable hexadecimal values are 7FF (maximum) to

800 (minimum), with all 0s being midscale. Rapidly changing

the contents of the control DAC register (up to 100 MSPS)

allows IOUT2 to assume any programmable waveform.

Observing the Filtered IOUT1 and the Filtered IOUT2

The filtered I (cosine DAC) and Q (control DAC) outputs can

be observed at J6 (the I, or cosine DAC, signal) and J7 (the Q, or

control DAC, signal). Use the following procedure to route the

50 Ω (input and output Z) low-pass filters into the pathways of

the I and Q signals to remove images, aliased harmonics, and

other spurious signals that are greater than approximately

120 MHz:

Install shorting jumpers at W7 and W10.

Install a shorting jumper at W16.

Install a shorting jumper on Pin 1 and Pin 2 (bottom two pins)

of the 3-pin W1 header.

Install a shorting jumper on Pin 1 and Pin 2 (bottom two pins)

of the 3-pin W4 header.

Install a shorting jumper on Pin 2 and Pin 3 (bottom two pins)

of the 3-pin W2 and W8 headers.

The resulting signals appear as nearly pure sine waves and are

90° out of phase with each other. These filters are designed with

the assumption that the system clock speed is at or near its

maximum speed (300 MHz). If the system clock speed is much

less than 300 MHz, for example 200 MHz, it is possible, or

inevitable, that unwanted DAC products other than the

fundamental signal will be passed by the low-pass filters.

If an AD9852 evaluation board is used, any reference to the Q

signal should be interpreted to mean the control DAC.

Observing the Filtered IOUT1 and the Filtered IOUT1

The filtered I DAC outputs can be observed at J6 (the true signal)

and J7 (the complementary signal). Use the following procedure to

route the 120 MHz low-pass filters in the true and complementary

output paths of the I DAC to remove images, aliased harmonics,

and other spurious signals above approximately 120 MHz:

Install shorting jumpers at W7 and W10.

Install a shorting jumper at W16.

Install a shorting jumper on Pin 2 and Pin 3 (top two pins)

of the 3-pin W1 header.

Install a shorting jumper on Pin 2 and Pin 3 (top two pins)

of the 3-pin W4 header.

Install a shorting jumper on Pin 2 and Pin 3 (bottom two pins)

of the 3-pin W2 and W8 headers.

The resulting signals appear as nearly pure sine waves and are

180° out of phase with each other. If the system clock speed is

much less than 300 MHz, for example 200 MHz, it is possible,

or inevitable, that unwanted DAC products other than the

fundamental signal will be passed by the low-pass filters.

Connecting the High Speed Comparator

To connect the high speed comparator to the DAC output

signals use either the quadrature filtered output configuration

(AD9854 only) or the complementary filtered output configuration

(both AD9854 and AD9852). Follow Step 1 through Step 4 of

either the Observing the Filtered IOUT1 and the Filtered

IOUT2 section or the Observing the Filtered IOUT1 and the

Filtered IOUT1 section. Then install a shorting jumper on Pin 1

and Pin 2 (the top two pins) of the 3-pin W2 and W8 headers.

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