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AD9852ASQZ 数据表(PDF) 12 Page - Analog Devices

部件名 AD9852ASQZ
功能描述  CMOS 300 MSPS Complete DDS
PDF  52 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD9852ASQZ 数据表(HTML) 12 Page - Analog Devices

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AD9852
Rev. E | Page 12 of 52
TYPICAL PERFORMANCE CHARACTERISTICS
Figure 4 to Figure 9 indicate the wideband harmonic distortion performance of the AD9852 from 19.1 MHz to 119.1 MHz fundamental
output, reference clock = 30 MHz, REFCLK multiplier = 10×. Each graph is plotted from 0 MHz to 150 MHz (Nyquist).
0
START 0Hz
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
15MHz/
STOP 150MHz
Figure 4. Wideband SFDR, 19.1 MHz
0
START 0Hz
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
15MHz/
STOP 150MHz
Figure 5. Wideband SFDR, 39.1 MHz
0
START 0Hz
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
15MHz/
STOP 150MHz
Figure 6. Wideband SFDR, 59.1 MHz
0
START 0Hz
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
15MHz/
STOP 150MHz
Figure 7. Wideband SFDR, 79.1 MHz
0
START 0Hz
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
15MHz/
STOP 150MHz
Figure 8. Wideband SFDR, 99.1 MHz
0
START 0Hz
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
15MHz/
STOP 150MHz
Figure 9. Wideband SFDR, 119.1 MHz



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