AD9852ASQZ datasheet(17/52 Pages) AD

17 / 52 page

AD9852

Rev. E | Page 17 of 52

TUNING

WORD

LOOP

FILTER

PHASE

COMPARATOR

REFERENCE

CLOCK

RF FREQUENCY

OUT

FILTER

AD9852

DDS

DIVIDE-BY-N

VCO

Figure 29. Agile High Frequency Synthesizer

REFERENCE

CLOCK

1:1 TRANSFORMER

THAT IS, Mini-Circuits® T1-1T

FILTER

DIFFERENTIAL

TRANSFORMER-COUPLED

OUTPUT

AD9852

DDS

IOUT

Figure 30. Differential Output Connection for Reduction of Common-Mode Signals

μPROCESSOR/

CONTROLLER

FPGA, ETC.

RSET

8-BIT PARALLEL OR

SERIAL PROGRAMMING

DATA AND CONTROL

SIGNALS

AD9852

CMOS LOGIC CLOCK OUT

REFERENCE

CLOCK

300MHz MAX DIRECT

MODE OR 15MHz TO 75MHz

MAX IN THE 4

× TO 20× CLOCK

MULTIPLIER MODE

COSINE

DAC

NOTES

1. IOUT = APPROXIMATELY 20mA MAX WHEN RSET = 2kΩ.

2. SWITCH POSITION 1 PROVIDES COMPLEMENTARY

SINUSOIDAL SIGNALS TO THE COMPARATOR TO

PRODUCE A FIXED 50% DUTY CYCLE FROM THE

COMPARATOR.

3. SWITCH POSITION 2 PROVIDES A USER-PROGRAMMABLE

DC THRESHOLD VOLTAGE TO ALLOW SETTING OF THE

COMPARATOR DUTY CYCLE.

LOW-PASS

FILTER

LOW-PASS

FILTER

CONTROL

DAC

Figure 31. Frequency Agile Clock Generator Applications for the AD9852

AD9852ASQZ 数据表(PDF) 17 Page - Analog Devices

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