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ICS1889 数据表(PDF) 3 Page - Integrated Circuit Systems |
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ICS1889 数据表(HTML) 3 Page - Integrated Circuit Systems |
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3 / 35 page ![]() 3 ICS1889 Media Independent Interface (MII) The ICS1889 implements a fully compliant IEEE 802.3µ Media Independent Interface for connection to MACs or repeaters which allows connections between the ICS1889 and MAC on the same board, motherboard/daughter board or via a cable in a similar manner to AUI connections. The MII is a specification of signals and protocols which formalizes the interfacing of a 10/100 Mbps Ethernet Media Access Controller (MAC) to the underlying physical layer. The specification is such that different physical media may be supported (such as 100Base-TX, 100Base-T4 and 100Base- FX) transparently to the MAC. The MII specifies transmit and receive data paths. Each path is 4-bits wide allowing for transmission of a nibble or single symbol. The transmit data path includes a transmit clock for synchronous transfer, a transmit enable signal and a transmit error signal. The receive data path includes a receive data clock for synchronous transfer, a receive data valid signal and a receive error signal. Both the transmit clock and receive clock are sourced by the ICS1889. The ICS1889 provides the MII signals carrier sense and collision detect. In half duplex mode, carrier sense indicates that data is being transmitted or received, and in full duplex mode it indicates that data is being received. Collision detect indicates that data has been received while a transmission is in progress. The MII also specifies a two wire interface and a protocol between station management and the physical layer. The ICS1889 implements this interface providing a bidirectional data line and a clock input for synchronizing the data transfers. This interface allows station management to read and write all of the ICS1889 registers. The ICS1889 is designed to allow hot insertion of an MII cable into the MAC. During the power-up phase, the ICS1889 will isolate the MII and the transmit pair by tristating the PHY outputs. |
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