ICS1889 datasheet(10/35 Pages) ICST

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ICS1889

Status Register (register 1)

The ICS1889 status register is a 16 bit read only register

used to indicate the basic status of the ICS1889. It is

accessed via the management interface of the MII. It is

initialized during a power-up or reset to predefined default

values. If the ICS1889 is enabled for auto-configuration,

certain bits in the status register may be set to zero as defined

below.

100Base-T4 (bit 15)

This bit is permanently set to a logic zero indicating that the

ICS1889 is not able to support 100Base-T4 operation.

100Base-X Full Duplex (bit 14)

This bit defaults to a logic one indicating that the ICS1889 is

able to support 100Base-X Full Duplex operation.

100Base-X Half Duplex (bit 13)

This bit defaults to a logic one indicating that the ICS1889 is

able to support 100Base-X Half Duplex operation.

10 Mbps Full Duplex (bit 12)

This bit is permanently set to a logic zero indicating that

10Base-T is not supported.

10 Mbps Half Duplex (bit 11)

This bit is permanently set to a logic zero indicating that

10Base-T is not supported.

Reserved (bits 10 through 6)

These bits are reserved for future IEEE standards. When read,

logic zeroes are returned. Writing has no effect on ICS1889

operation.

Auto-Negotiation Complete (bit 5)

This bit is permanently set to a logic zero.

Remote Fault (bit 4)

When set to a logic one, this bit indicates that a remote fault

(Far End Fault) has been detected by the Link Monitor. This

bit remains set to a logic one until it is cleared by reading the

status register or by a reset command

If the link partner is implemented with a non-ICS1889 device,

the causes of a link failure will be specified by that PHY

vendor. If the link partner is implemented with an ICS1889, a

remote fault indication means a receive channel error

occurred.

Auto-Negotiation Ability (bit 3)

This feature is not available with fiber optic solutions. This bit

is permanently set to a logic zero indicating that it is not

supported.

Control Register (register 1)

BIT

Definition

When bit = 0

When bit = 1

Access

Default

OUI bit 19 | s

OUI bit 20 | t

OUI bit 21 | u

OUI bit 22 | v

OUI bit 23 | w

OUI bit 24 | x

Manufacturer’s Model Number bit 5

Manufacturer’s Model Number bit 4

Manufacturer’s Model Number bit 3

Manufacturer’s Model Number bit 2

Manufacturer’s Model Number bit 1

Manufacturer’s Model Number bit 0

Revision Number bit 3

Revision Number bit 2

Revision Number bit 1

Revision Number bit 0

ICS1889 数据表(PDF) 10 Page - Integrated Circuit Systems

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