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ICS1889 数据表(PDF) 11 Page - Integrated Circuit Systems |
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ICS1889 数据表(HTML) 11 Page - Integrated Circuit Systems |
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11 / 35 page ![]() 11 ICS1889 Link Status (bit 2) When set to a logic one, this bit indicates that the Link Monitor has established a valid link. If the Link Monitor detects a link failure, this bit is set to a logic zero and remains zero through the next read of the status register. A link failure may be due to an error in the receive channel or an error in the receive channel of the link partner (that is, a remote fault). Jabber detect (bit 1) This bit is permanently set to a logic zero. Extended Capability (bit 0) This bit is permanently set to a logic one indicating that the ICS1889 has an extended register set. |
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