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PM0214 数据表(PDF) 123 Page - STMicroelectronics |
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PM0214 数据表(HTML) 123 Page - STMicroelectronics |
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123 / 245 page ![]() DocID022708 Rev 4 123/245 PM0214 The STM32 Cortex-M4 instruction set 244 Examples UMULL R0, R4, R5, R6 ; Unsigned (R4,R0) = R5 x R6 SMLAL R4, R5, R3, R8 ; Signed (R5,R4) = (R5,R4) + R3 x R8 3.6.12 SDIV and UDIV Signed divide and unsigned divide. Syntax SDIV{cond} {Rd,} Rn, Rm UDIV{cond} {Rd,} Rn, Rm where: • ‘cond’ is an optional condition code (see Conditional execution on page 64) • ‘Rd’ is the destination register. If Rd is omitted, the destination register is Rn • ‘Rn,’ is the register holding the value to be divided • ‘Rm’ is a register holding the divisor Operation SDIV performs a signed integer division of the value in Rn by the value in Rm. UDIV performs an unsigned integer division of the value in Rn by the value in Rm. For both instructions, if the value in Rn is not divisible by the value in Rm, the result is rounded towards zero. Restrictions Do not use either SP or PC. Condition flags These instructions do not change the flags. Examples SDIV R0, R2, R4; signed divide, R0 = R2/R4 UDIV R8, R8, R1; unsigned divide, R8 = R8/R1 |
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