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ADP5054

Data Sheet

Rev. B | Page 18 of 31

TOTAL OUPTUT LOAD (A)

CHANNEL 1 CURRENT

CHANNEL 2 CURRENT

Figure 36. Channel 1 and Channel 2 Current Balance in Parallel Output

Configuration, VIN = 12 V, VOUT = 1.2 V, fSW = 600 kHz, FPWM Mode

0.5

1.0

1.5

2.0

2.5

3.0

TOTAL OUPTUT LOAD (A)

CHANNEL 3 CURRENT

CHANNEL 4 CURRENT

Figure 37. Channel 3 and Channel 4 Current Balance in Parallel Output

Configuration, VIN = 12 V, VOUT = 1.2 V, fSW = 600 kHz, FPWM Mode

STARTUP WITH PRECHARGED OUTPUT

The buck regulators in the ADP5054 include a precharged

start-up feature to protect the low-side FETs from damage

during startup. If the output voltage is precharged before the

regulator is turned on, the regulator prevents reverse inductor

current—which would discharge the output capacitor—until

the internal soft start reference voltage exceeds the precharged

voltage on the feedback (FBx) pin.

CURRENT-LIMIT PROTECTION

The buck regulators in the ADP5054 include peak current-limit

protection circuitry to limit the amount of positive current

flowing through the high-side MOSFET switch. The peak

current limit on the power switch limits the amount of current

that can flow from the input to the output. The programmable

current-limit threshold feature allows the use of small size

inductors for low current applications.

To configure the current-limit threshold for Channel 1, connect

a resistor from the DL1 pin to ground; to configure the current-

limit threshold for Channel 2, connect another resistor from the

DL2 pin to ground. Table 10 lists the peak current-limit threshold

settings for Channel 1 and Channel 2.

Table 10. Peak Current-Limit Threshold Settings for

Channel 1 and Channel 2

RILIM1 or RILIM2

Typical Peak Current-Limit Threshold (A)

Floating

6.9

47 kΩ

3.8

22 kΩ

10.4

The buck regulators in the ADP5054 include negative current-

limit protection circuitry to limit certain amounts of negative

current flowing through the low-side MOSFET switch.

FREQUENCY FOLDBACK

The buck regulators in the ADP5054 include frequency

foldback to prevent output current runaway when a hard short

occurs on the output. Frequency foldback is implemented as

follows:

•

If the voltage at the FBx pin falls below half of the target

output voltage, the switching frequency is reduced by half.

•

If the voltage at the FBx pin falls again to below one-fourth of

the target output voltage, the switching frequency is reduced

by half of its current value again, as one-fourth of fSW.

The reduced switching frequency allows more time for the inductor

current to decrease but also increases the ripple current during

peak current regulation. This results in a reduction in average

current and prevents output current runaway.

PULSE SKIP IN MAXIMUM DUTY

Under maximum duty cycle conditions, frequency foldback

maintains the output in regulation. If the maximum duty cycle

is reached—for example, when the input voltage decreases—the

PWM modulator skips every other PWM pulse, resulting in a

switching frequency foldback of one-half of the switching

frequency. If the maximum duty cycle increases further, the

PWM modulator skips two of every three PWM pulses,

resulting in a switching frequency foldback that is one-third of

the switching frequency. Frequency foldback increases the

effective maximum duty cycle, thereby decreasing the dropout

voltage between the input and output voltages.

SHORT-CIRCUIT PROTECTION (SCP)

The buck regulators in the ADP5054 include a hiccup mode for

overcurrent protection (OCP). When the peak inductor current

reaches the current-limit threshold, the high-side MOSFET turns

off, and the low-side MOSFET turns on until the next cycle.

When hiccup mode is active, the overcurrent fault counter is

incremented. If the overcurrent fault counter reaches 15 and

overflows (indicating a short-circuit condition), both the high-

side and low-side MOSFETs are turned off. The buck regulator

remains in hiccup mode for a period equal to seven soft start

cycles and then attempts to restart from soft start. If the short-

circuit fault clears, the regulator resumes normal operation;

otherwise, it reenters hiccup mode after the soft start.

Hiccup detection is masked during the initial soft start cycle to

enable startup of the buck regulator under heavy load conditions.

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