ADP5054ACPZ-R7 datasheet(23/31 Pages) AD

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Data Sheet

ADP5054

Rev. B | Page 23 of 31

COMPENSATION COMPONENTS DESIGN

For the peak current-mode control architecture, the power stage

can be simplified as a voltage controlled current source that

supplies current to the output capacitor and load resistor. The

simplified loop is composed of one domain pole and a zero

contributed by the output capacitor ESR. The control-to-output

transfer function is shown in the following equations:

























COMP

OUT

)

(

)

(

)

(

OUT

ESR

(

)

OUT

ESR

where:

AVI = 20 A/V for Channel 1 or Channel 2, and 6.66 A/V for

Channel 3 or Channel 4.

R is the load resistance.

RESR is the equivalent series resistance of the output capacitor.

COUT is the output capacitance.

The ADP5054 uses a transconductance amplifier as the error

amplifier to compensate the system. Figure 39 shows the

simplified, peak current-mode control, small signal circuit.

RESR

–

CCP

COUT

RTOP

RBOT

–

AVI

VOUT

VCOMP

VOUT

Figure 39. Simplified, Peak Current-Mode Control, Small Signal Circuit

The compensation components, RC and CC, contribute a zero,

and the optional CCP and RC contribute an optional pole.

The closed-loop transfer equation is as follows:

)

(

)

(

TOP

BOT













−

The following guidelines show how to select the compensation

components (RC, CC, and CCP) for ceramic output capacitor

applications.

1. Determine the cross frequency (fC). Generally, fC is

between fSW/12 and fSW/6.

2. RC can be calculated using the following equation:

OUT

3. Place the compensation zero at the domain pole (fP).

CC can be determined as follows:

(

)

OUT

ESR

4. CCP is optional. It can be used to cancel the zero caused by

the ESR of the output capacitor.

OUT

ESR

POWER DISSIPATION

The total power dissipation in the ADP5054 simplifies to

PD = PBUCK1 + PBUCK2 + PBUCK3 + PBUCK4

Buck Regulator Power Dissipation

The power dissipation (PLOSS) for each buck regulator includes

power switch conductive losses (PCOND), switching losses (PSW),

and transition losses (PTRAN). Other sources of power dissipation

exist, but these sources are generally less significant at the high

output currents of the application thermal limit.

Use the following equation to estimate the power dissipation of

the buck regulator:

PLOSS = PCOND + PSW + PTRAN

Power Switch Conduction Loss (PCOND)

Power switch conduction losses are caused by the flow of output

current through both the high-side and low-side power

switches, each of which has its own internal on resistance

(RDS(ON)).

Use the following equation to estimate the power switch

conduction loss:

PCOND = (RDS(ON)_HS × D + RDS(ON)_LS × (1 − D)) × IOUT2

where:

RDS(ON)_HS is the high-side MOSFET on resistance.

RDS(ON)_LS is the low-side MOSFET on resistance.

D is the duty cycle (D = VOUT/VIN).

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