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USB3370 数据表(PDF) 22 Page - Microchip Technology |
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USB3370 数据表(HTML) 22 Page - Microchip Technology |
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22 / 75 page ![]() USB3370 DS00001915B-page 22 2012 - 2015 Microchip Technology Inc. 5.5.4 REFCLK ENABLE/DISABLE The REFCLK should be enabled when the RESETB pin is brought high. The ULPI interface will start running after the time specified in Table 4-2. If the reference clock enable is delayed relative to the RESETB pin, the ULPI interface will start operation delayed by the same amount. The reference clock can be run at anytime the RESETB pin is low without causing the USB3370 to start-up or draw current. When the USB3370 is placed in Low Power Mode or Carkit Mode, the reference clock can be stopped after the final ULPI register write is complete. The STP pin is asserted to bring the USB3370 out of Low Power Mode. The reference clock should be started at the same time STP is asserted to minimize the USB3370 start-up time. If the reference clock is stopped while in ULPI Synchronous mode the PLL will come out of lock and the frequency of oscillation will decrease to the minimum allowed by the PLL design. If the reference clock is stopped during a USB ses- sion, the session may drop. 5.6 Internal Regulators and POR The USB3370 includes integrated power management functions, including a Low-Dropout regulator that can be used to generate the 3.3V USB supply, an integrated 1.8V regulator, and a POR generator described in Section 5.6.2. 5.6.1 INTEGRATED LOW DROPOUT REGULATORS The USB3370 includes two integrated linear regulators. Power sourced at the VBAT pin is regulated to 3.3V and 1.8V output on the VDD33 and VDD18 pins. To ensure stability, both regulators require an external bypass capacitor as spec- ified in Table 4-10 placed as close to the pin as possible. The USB3370 regulators are designed to generate the 3.3 Volt and 1.8 Volt supplies for the USB3370 only. Using the regulators to provide current for other circuits is not recommended and Microchip does not guarantee USB performance or regulator stability. During USB UART mode the 3.3V regulator output voltage can be changed to allow the USB3370 to work with UARTs operating at different operating voltages. The 3.3V regulator output is configured to the voltages shown in Table 4-10 with the UART RegOutput[1:0] bits in the USB IO & Power Management register. The regulators are enabled by the RESETB pin. When RESETB pin is low both regulators are disabled and the regulator outputs are pulled low by weak pull-down. The RESETB pin must be brought high to enable the regulators. For peripheral-only or host-only bus-powered applications, the input to VBAT may be derived from the VBUS pin of the USB connector. In this configuration, the supply must be capable of withstanding any transient voltage present at the VBUS pin of the USB connector. Microchip does not recommend connecting the VBAT pin to the VBUS terminal of the USB connector. 5.6.2 POWER ON RESET (POR) The USB3370 provides a POR circuit that generates an internal reset pulse after the VDD18 supply is stable. After the internal POR goes high the USB3370 will release from reset and begin normal ULPI operation as described in Section 5.6.4. The ULPI registers will power up in their default state summarized in Table 7-1 when the 1.8V supply comes up. Cycling the RESETB pin can also be used to reset the ULPI registers to their default state (and reset all internal state machines) by bringing the pin low for a minimum of 1 microsecond and then high. It is not necessary to wait for the VDD33 and VDD18 pins to discharge to 0 volts to reset the part. The RESETB pin must be pulled high to enable the 3.3V and 1.8V regulators. A pull-down resistor is not present on the RESETB pin and therefore the system should drive the RESETB pin to the desired state at all times. If the system does not need to place the USB3370 into reset mode the RESETB pin can be connected to a supply between 1.8V and 3.3V. 5.6.3 RECOMMENDED POWER SUPPLY SEQUENCE For USB operation, the USB3370 requires a valid voltage on the VBAT and VDDIO pins. The VDD33 and VDD18 reg- ulators are automatically enabled when the RESETB pin is brought high. For the USB3343, Table 5-2 presents the power supply configurations in more detail. The RESETB pin can be held low until the VBAT supply is stable. If the Link is not ready to interface the USB3370, the Link may choose to hold the RESETB pin low until it is ready to control the ULPI interface. |
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