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USB3370 数据表(PDF) 58 Page - Microchip Technology |
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USB3370 数据表(HTML) 58 Page - Microchip Technology |
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58 / 75 page ![]() USB3370 DS00001915B-page 58 2012 - 2015 Microchip Technology Inc. 7.1.2.4 Carkit Interrupt Latch Address = 21h (read only with auto-clear) Note 7-3 rd: Read Only with auto clear 7.1.3 VENDOR REGISTER ACCESS The vendor specific registers include the range from 30h to 3Fh. These can be accessed by the ULPI immediate register read / write. 7.1.3.1 HS Compensation Register Address = 31h (read / write) The USB3370 is designed to meet the USB specifications and requirements when the DP and DM signals are properly designed on the PCB. The DP and DM trace impedance should be 45ohm single ended and 90ohm differential. In cases where the DP and DM traces are not able to meet these requirements the HS Compensation register can be used to compensate for the losses in signal amplitude. Field Name Bit Access Default Description IdFloat Latch 0rd (Note 7- 3) 0b Asserted if the state of the ID pin changes from non- floating to floating while the IdFloatRise bit is enabled or if the state of the ID pin changes from floating to non-floating while the IdFloatFall bit is enabled. VdatDet Latch 1rd 0b If VdatDetIntEn is set and the VdatDet bit changes state, this bit will be asserted. CarDp Latch 2 rd 0b Not Implemented. Reads as 0b. RidConversionLatch 3rd (Note 7-3) 0b If RidIntEn is set and the state of the RidConversionDone bit changes from a 0 to 1 this bit will be asserted. Reserved 7:4 rd 0000b Read only, 0. Field Name Bit Access Default Description VariSense 1:0 rd/w 00b Used to lower the threshold of the squelch detector. 00: 100% (default) 01: 83% 10: 66.7% 11: 50% Reserved 2 rd 0b Read only, 0. Reserved 3 rd 0b Read only, 0. PHYBoost 6:4 rd/w 000b Used to change the output voltage of the Hi-Speed transmitter 000: Nominal 001: +3.7% 010: +7.4% 011: +11.0% 100: +14.7% 101: +18.3% 110: +22.0% 111: +25.7% Reserved 7 rd 0b Read only, 0. |
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