MCP8024 datasheet(30/46 Pages) MICROCHIP

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MCP8024

DS20005228A-page 30

 2013 Microchip Technology Inc.

5.1.2

BOOTSTRAP CAPACITOR

The high-side driver bootstrap capacitor needs to

power the high-side driver and gate for 1/3 of the motor

electrical period for a 3-phase BLDC motor.

Let:

• MOSFET driver current: 300 mA

• PWM period: 50 µs (20 kHz) to 50 ms (20Hz)

• Minimum duty cycle: 1% (500 ns to 500 µs)

• Maximum duty cycle: 99% (49.5 µs to 49.5 ms)

•Vin = 12V

• Minimum gate drive voltage: 8V (VGS)

• Total gate charge: 130 nC (80A MOSFET)

•Allowable VGS drop (VDROP): 3V (12V - 3V = 9V)

• Switch RDSON: 100 m

• Driver bias current: 20 µA (IBIAS)

• Switching transition time (tSW): 40 ns

Solve for the smallest capacitance that can supply:

- 130 nC of charge to the MOSFET gate

- 1 Megohm Gate-Source resistor current

- Driver bias current and switching losses

QMOSFET = 130 nC

QRESISTOR = [(VGS/R) * TON]

QDRIVER = (IBIAS * TON + IDRIVER * tSW)

TON = 49.5 ms (99% DC) for worst case.

QRESISTOR = (12V/1 Megohm) * 49.5 ms

QRESISTOR = 594 nC

QDRIVER = 20 µA * 49.5 ms + 300 mA * 40 ns

QDRIVER = 1.002 µC

Sum all of the energy requirements:

C = (QMOSFET + QRESISTOR + QDRIVER)/VDROP

C = (130 nC + 594 nC + 1.002 µC) / 3V

C = 575 nF

Choose a bootstrap capacitor value that is larger than

575 nF.

5.1.3

BUCK SWITCHER

5.1.3.1

Calculate the Buck Inductor for

Discontinuous Mode Operation

Let:

Vin = 6V (worse case)

Vout = 3.3V

Iout = 225 mA

Switching Frequency (FSW): 468 kHz (TSW = 2.137 µs)

LMAX  Vout * (1 - Vout / Vin) * TSW / (2 * Iout)

LMAX  3.3V * (1 - 3.3V/6.0V) * 2.137 µs / (2 * 225 mA)

LMAX  7.05 µH

Choose an inductor

 7.05 µH to ensure Discontinuous

Conduction mode.

Table 5-1 shows the various maximum inductance val-

ues for a worst case input voltage of 6V and various

output voltages.

5.1.3.2

Determine the Peak Switch Current

for the Calculated Inductor

Ipeak = (Vs - Vo) * D * T/L

Ipeak = (6V - 3.3V) * (3.3V/6.0V) * 2.137 µs / 7.05 µH

Ipeak = 450 mA

5.1.3.3

Setting the Buck Output Voltage

The buck output voltage is set by a resistor voltage

divider from the inductor output to ground. The divider

center tap is fed back to the MCP8024 FB pin. The FB

pin is compared to an internal 1.25V reference voltage.

When the FB pin voltage drops below the reference

voltage, the Buck duty cycle increases. When the FB

pin rises above the reference voltage, the Buck duty

cycle decreases.

FIGURE 5-2: Typical Buck Application.

Start with an R2 value of 10K to 51K to minimize current

through the divider.

VBUCK = 1.25V * (R1 + R2) / R2

OUTPUT

CONTROL

LOGIC

VDD

CURRENT_REF

VDD-12V

BANDGAP

REFERENCE

Sc hottky

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