MCP8024 datasheet(16/46 Pages) MICROCHIP

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MCP8024

DS20005228A-page 16

 2013 Microchip Technology Inc.

3.2

VDD

Connect VDD to the main supply voltage. This voltage

must not exceed the maximum operating limits of the

device. Connect a bulk capacitor close to this pin for

good load step performance and transient protection.

The type of capacitor used can be ceramic, tantalum or

aluminum electrolytic. The low ESR characteristics of

the ceramic will yield better noise and PSRR perfor-

mance at high frequency.

3.3

PGND, Exposed Pad (EP)

Device ground. The PCB ground traces should be

short,

wide, and form a STAR pattern to the power

source. The Exposed Pad (EP) PCB area should be a

copper pour with thermal vias to help transfer heat

away from the device.

3.4

+12V

+12 volt Low Dropout (LDO) voltage regulator output.

The +12V LDO may be used to power external devices

such as Hall-effect sensors or amplifiers. The LDO

requires an output capacitor for stability. The positive

side of the output capacitor should be physically

located as close to the +12V pin as is practical. For

most applications, 4.7 µF of capacitance will ensure

stable operation of the LDO circuit.

The type of capacitor used can be ceramic, tantalum or

aluminum electrolytic. The low ESR characteristics of

the ceramic will yield better noise and PSRR perfor-

mance at high frequency.

3.5

+5V

+5 volt Low Dropout (LDO) voltage regulator output.

The +5V LDO may be used to power external devices

such as Hall-effect sensors or amplifiers. The LDO

requires an output capacitor for stability. The positive

side of the output capacitor should be physically

located as close to the +5V pin as is practical. For most

applications, 4.7 µF of capacitance will ensure stable

operation of the LDO circuit.

The type of capacitor used can be ceramic, tantalum or

aluminum electrolytic. The low ESR characteristics of

the ceramic will yield better noise and PSRR

performance at high frequency.

3.6

Buck

regulator

switch

node

external

inductor

connection. Connect this pin to the external inductor

chosen for the buck regulator.

3.7

Buck regulator feedback node that is compared with

internal 1.25V reference voltage. Connect this pin to a

resistor divider that sets the buck regulator output

voltage. Connecting this pin to the +5V LDO output

disables the buck regulator.

3.8

CAP1, CAP2

Charge pump flying capacitor inputs. Connect the

charge pump capacitor across these two pins.

3.9

Chip Enable input used to enable/disable the output

driver and on-board functions. When CE is high, all

device functions are enabled. When CE is low, the

device operates in Reduced mode. The H-Bridge, cur-

rent amplifiers and 12V LDO are disabled. The buck

regulator, 5V LDO, DE2, voltage and temperature sen-

sor functions are not affected.

The CE is also used to clear any hardware faults. When

a fault occurs, the CE input may be used to clear the

fault by setting the pin low and then high again. The

fault is cleared by the rising edge of the CE signal if the

hardware fault is no longer active.

The CE pin has an internal 47K pulldown.

3.10

I_OUT1, I_OUT2, I_OUT3

Current sense amplifier output. May be used with feed-

back resistors to set the current sense gain.

3.11

ISENSE1, ISENSE2, ISENSE3 +/-

Current sense amplifier inverting and non-inverting

inputs. Used in conjunction with I_OUTx pins to set cur-

rent sense gain.

3.12

/ILIMIT_OUT

Current limit output signal. The open-drain output goes

low when the current sensed by current sense amplifier

1 exceeds the value set by the internal current refer-

ence DAC. The DAC has an offset of 0.991V (typical)

which represents zero current flow. The open-drain out-

put will also go low while a motor fault is active.

3.13

PWM1H, PWM2H, PWM3H

Digital PWM inputs for high-side driver control. Each

input has a 47K pulldown to ground. The PWM signals

may contain dead-time timing or the system may use

the Configuration register 2 to set the dead time.

3.14

PWM1L, PWM2L, PWM3L

Digital PWM inputs for low-side driver control. Each

input has a 47K pulldown to ground. The PWM signals

may contain dead-time timing or the system may use

the Configuration register 2 to set the dead time.

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