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MCP8024 数据表(PDF) 18 Page - Microchip Technology

部件名 MCP8024
功能描述  Internal Bandgap Reference
PDF  46 Pages
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制造商  MICROCHIP [Microchip Technology]
网页  http://www.microchip.com
标志 MICROCHIP - Microchip Technology

MCP8024 数据表(HTML) 18 Page - Microchip Technology

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MCP8024
DS20005228A-page 18
 2013 Microchip Technology Inc.
4.0
DETAILED DESCRIPTION
4.1
BIAS GENERATOR
The internal bias generator controls three voltage rails.
Two fixed-output low-dropout linear regulators, an
adjustable buck switch-mode power converter, and an
unregulated charge pump are controlled through the
bias generator. In addition, the bias generator per-
forms supervisory functions.
4.1.1
+12V LOW-DROPOUT LINEAR
REGULATOR (LDO)
The +12V rail is used for bias of the 3-phase power
MOSFET bridge.
The regulator is capable of supplying 20mA of external
load current. The regulator has a minimum overcurrent
limit of 30 mA.
The low-dropout regulators require an output capacitor
connected from VOUT to GND to stabilize the internal
control loop. A minimum of 4.7
F ceramic output
capacitance is required for the 12V LDO.
4.1.2
+5V LOW-DROPOUT LINEAR
REGULATOR (LDO)
The +5V LDO is used for bias of an external microcon-
troller, the internal current sense amplifier and the gate
control logic.
The +5V LDO is capable of supplying 20mA of exter-
nal load current. The regulator has a minimum over-
current limit of 30 mA. If additional external current is
required, the buck switch-mode power converter
should be utilized.
A minimum of 4.7
F ceramic output capacitance is
required for the 5V LDO.
4.1.3
BUCK SWITCH-MODE POWER
CONVERTER (SMPS)
The SMPS is a high-efficiency, fixed-frequency, step-
down DC-DC converter. The SMPS provides all the
active functions for local DC-DC conversion with fast
transient response and accurate regulation.
During normal operation of the buck power stage, Q1
is repeatedly switched on and off with the on and off
times governed by the control circuit. This switching
action causes a train of pulses at the LX node which
are filtered by the L/C output filter to produce a DC
output voltage, VO. Figure 4-1 depicts the functional
block diagram of the SMPS.
FIGURE 4-1:
SMPS Functional Block
Diagram.
The SMPS is designed to operate in Discontinuous
Conduction Mode (DCM) with Voltage mode control
and current limit protection. The SMPS is capable of
supplying 5V, 150mA to an external load at a fixed
switching frequency of 460 kHz with an input voltage
of 6V. The output of the SMPS is power limited. There-
fore, for a programmed output voltage of 3V, the
SMPS will be capable of supplying 250mA to an exter-
nal load. An external diode is required between the LX
pin and ground. The diode will be required to handle
the inductor current when the switch is off. The diode
is external to the device to reduce substrate currents
and power dissipation caused by the switcher. The
external diode carries the current during the switch off
time, eliminating the current path back through the
device.
At light loads the SMPS enters Pulse Frequency
Modulation (PFM), improving efficiency at the expense
of higher output voltage ripple. The PFM circuitry
provides a means to disable the SMPS as well. If the
SMPS is not utilized in the application, connecting the
feedback pin (FB) to an external 2.5V-to-5.0V supply
will force the SMPS to a shutdown state.
OUTPUT
CONTROL
LOGIC
VIN
+
-
LX
FB
+
-
Q1
CURRENT_REF
VDD-12V
BANDGAP
REFERENCE
+
-



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