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CS9210 数据表(PDF) 32 Page - National Semiconductor (TI) |
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CS9210 数据表(HTML) 32 Page - National Semiconductor (TI) |
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32 / 39 page ![]() www.national.com 32 Revision 3.2 Electrical Specifications (Continued) 5.4 AC CHARACTERISTICS The following tables list the AC characteristics including output delays, input setup requirements, input hold requirements and output float delays. The rising-clock- edge reference level VREF, and other reference levels are shown in Table 5-4. Input or output signals must cross these levels during testing. Input setup and hold times are specified minimums that define the smallest acceptable sampling window for which a synchronous input signal must be stable for correct oper- ation. All AC tests are at VDD = 2.75 to 3.05V (2.9V nomi- nal), TC =0 oCto 70oC, C L = 50 pF unless otherwise specified. Figure 5-1. Drive Level and Measurement Points for Switching Characteristics Table 5-4. Drive Level and Measurement Points for Switching Characteristics Symbol Voltage (V) VREF 1.5 VIHD 2.4 VILD 0.4 CLK OUTPUTS INPUTS VIHD VILD VREF Valid Input Valid Output n+1 Valid Output n VREF VREF VILD VIHD Min Max Legend: A = Maximum Output Delay Specification B = Minimum Output Delay Specification C = Minimum Input Setup Specification D = Minimum Input Hold Specification TX B A CD |
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