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CS9210 数据表(PDF) 35 Page - National Semiconductor (TI) |
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CS9210 数据表(HTML) 35 Page - National Semiconductor (TI) |
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35 / 39 page ![]() Revision 3.2 35 www.national.com Electrical Specifications (Continued) 5.4.3 Flat Panel Timing Figure 5-4. Flat Panel Interface Signals Table 5-7. Flat Panel Interface Timing (50 pF Output Load) Symbol Parameter DSTN Mode TFT Mode Units Min Max Min Max tP SHFCLK period 2*tD tD tD ns tPT SHFCLK rise/fall transition time 4 4 ns tPHP SHFCLK high pulse width tD–4 Follows DOTCLK input ns tPLP SHFCLK low pulse width tD–4 ns tPOS Panel output setup to falling SHFCLK tD–4 tD–4 ns tPOH Panel output hold from falling SHFCLK tD–4 tD–4 ns SHFCLK tP tPHP tPOH tPOS tPT FP_VDDEN, FP_VCONEN DISPOFF#, FLM, LP UD[11:0], LD[11:0] tPLP |
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