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CS9210 数据表(PDF) 36 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
部件名 CS9210
功能描述  Geode??CS9210 Graphics Companion DSTN Controller
PDF  39 Pages
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制造商  NSC [National Semiconductor (TI)]
网页  http://www.national.com
标志 NSC - National Semiconductor (TI)

CS9210 数据表(HTML) 36 Page - National Semiconductor (TI)

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36
Revision 3.2
Electrical Specifications (Continued)
5.4.4
Memory Interface Timing
Figure 5-5. Memory Interface Signals
Table 5-8. Memory Interface Timing (15 pF Output Load)
Symbol
Parameter
1X Refresh Mode
(Min tD = 15.4 ns)
2X Refresh Mode
(Min tD = 15.4 ns)
Unit
Min
Max
Min
Max
tOWS
OEA/B# and WEA/B# setup to falling RASA/B#
3*tD–5
3*tD–5
ns
tOWH
OEA/B# and WEA/B# hold from rising RASA/B#
3*tD–2
3*tD–2
ns
tRP
RASA/B# precharge time
4*tD–2
3*tD–2
ns
tRCD
Falling RASA/B# to falling UCASA/B#, LCASA/B#
2*tD-1
2*tD-1
ns
tCAS
UCASA/B# and LCASA/B# low pulse width
2*tD
tD
ns
tCP
UCASA/B# and LCASA/B# precharge time
2*tD–3
2*tD–3
ns
tASR
MA_A/B setup to falling RASA/B#
3*tD–2
3*tD–2
ns
tRAH
MA_A/B hold from falling RASA/B#
tD–1.5
tD–1.5
ns
tASC
MA_A/B setup to falling UCASA/B#, LCASA/B#
tD–2.5
tD–2.5
ns
tCAH
MA_A/B hold from falling UCASA/B#, LCASA/B#
2*tD–2
tD–2
ns
tDS
MD_A/B write data setup to falling UCASA/B#, LCASA/B#
2*tD–5
2*tD–5
ns
tDH
MD_A/B write data hold from falling UCASA/B#, LCASA/B#
2*tD–2
2*tD–2
ns
tDV
MD_A/B read data valid from falling UCASA/B#, LCASA/B#
2*tD–10
2*tD–10
ns
tASC tCAH
RASA/B#
UCASA/B#
LCASA/B#
MA_A/B[9:0]
MD_A/B[15:0]
OEA/B#
WEA/B#
tRP
tOWS
tOWH
tRCD
tCAS
tCP
tASR tRAH
tDS
tDH
(write)
MD_A/B[15:0]
tDV
(read)



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