TAS3208IPZP datasheet(27/79 Pages) TI1

27 / 79 page

TAS3208

www.ti.com

SLES201E

– JANUARY 2007 – REVISED MARCH 2011

GPIO1 Pin Function

•

After RESET or power-up initialization, if no EEPROM is present, a memory error occurs, or SDA and SCL

are pulled LOW for 1 ms, then TAS3208 will disable the master I2C interface and enable the slave I2C

interface initialization, to load the slave default configuration.

– When GPIO1 has been pulled HIGH through a 10-kΩ to 20-kΩ resistor, the TAS3208 will then initialize in

the default configuration with the serial data outputs not active. Once the TAS3208 has completed its

default initialization procedure, with the Status register updated and the I2C slave interface enabled,

GPIO1 will become an output and will be driven LOW. Following the HIGH to LOW transition of GPIO1,

the system controller can access the TAS3208 through the I2C interface and read the Status register to

determine the load status.

If a memory read error occurs, the TAS3208 reports the error in the Status register.

– When GPIO1 has been pulled LOW through a 10-kΩ to 20-kΩ resistor to permit a simple functional device

test, GPIO1 can be pulled LOW using external logic and a 10-k

Ω to 20-kΩ resistor. In this case, once the

TAS3208 has completed its default test initialization procedure, with the Status register updated and the

I2C slave interface enabled, the TAS3208 will stream audio from the input SDIN1 to outputs SDOUT1 and

SDOUT2.

At this point, GPIO1 becomes an output and will be driven LOW. If the external logic is no longer driving

GPIO1 LOW after the load has completed (

≉100 ms following a RESET if no EEPROM is present), the

state of GPIO1 can be observed. At this point, the system controller can access the TAS3208 through the

I2C interface and read the Status register to determine the load status.

NOTE

If the GPIO1 pin state is not observed, the only indication that the device has completed

its initialization procedure is that the TAS3208 will stream audio and the I2C slave

interface has been enabled.

NOTE

Some I2C masters will hang when they receive a NAC during an I2C transaction.

•

Once the TAS3208 has been programmed either through a successful boot load or via slave I2C download,

the operation of GPIO1 can be programmed to be an input or an output.

GPIO Ports

In I2C slave mode, the GPIO ports can be used as true general-purpose ports. Each port can be individually

programmed via the I2C bus to be either an input or output port. The default assignment for all GPIO ports in I2C

slave mode is an input port.

When a given GPIO port is programmed as an output port, by setting the appropriate bit in the bit field GPIODIR

of subaddress 0x0C to logic 1, the logic-level output is set by the logic level programmed into the appropriate bit

in bit field GPIO IN OUT. The I2C bus then controls the logic output level for those GPIO ports assigned as

output ports. When a given GPIO port is programmed as an input port by setting the appropriate bit in bit field

GPIODIR to logic 0, the logic input level into the GPIO port is written to the appropriate bit in bit field GPIO IN

OUT. The I2C bus then can be used to read bit field GPIO IN OUT to determine the logic levels at the input GPIO

ports. Whether a given bit in the bit field GPIO IN OUT is a bit to be read via the I2C bus or a bit to be written to

via the I2C bus is strictly determined by the corresponding bit setting in bit field GPIODIR.

In I2C slave mode, the GPIO input ports are read every GPIOMICROCOUNT micro clocks, as was the case in

the I2C master mode. However, parameter GPIO_samp_int does not have a role in I2C slave mode. If a GPIO

port is assigned as an output port, a logic 0 bit value is supplied by the TAS3208 for this GPIO port in response

to a read transaction at subaddress 0x0C.

If the GPIO ports are left in their power turnon default state, they are input ports with a weak pullup on the input

to VDSS.

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