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TAS3208IPZP 数据表(PDF) 65 Page - Texas Instruments

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部件名 TAS3208IPZP
功能描述  DIGITAL AUDIO PROCESSOR WITH ANALOG INTERFACE
PDF  79 Pages
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制造商  TI1 [Texas Instruments]
网页  http://www.ti.com
标志 TI1 - Texas Instruments

TAS3208IPZP 数据表(HTML) 65 Page - Texas Instruments

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TAS3208
www.ti.com
SLES201E
– JANUARY 2007 – REVISED MARCH 2011
Table 30. I2C RAM Load Control Register (0x04)
BYTE
DATA BLOCK FORMAT
SIZE
NOTES
Checksum of bytes 2 through N + 8, If this is a
1
–2
Checksum code
2 bytes
termination header, this value is 00 00.
0: Microprogram memory
1: Micro external data memory
2: DSP program memory
3
Memory to be loaded
1 byte
3: DSP coefficient memory
4: DSP data memory
5
–15: Reserved
4
Unused
1 byte
Reserved
6
–7
Starting TAS3208 memory address
2 bytes
If this is a termination header, this value is 00 00.
7
–8
Number of data bytes to be transferred
2 bytes
If this is a termination header, this value is 00 00.
Table 31. I2C RAM Load Data Register (0x05)
BYTE
8-BIT DATA
24-BIT DATA
28-BIT DATA
48-BIT DATA
55-BIT DATA
1
Datum 1 D7
–D0
XXXX D27
–D24
2
Datum 2 D7
–D0
D23
–D16
D23
–D16
X D54
–D48
3
Datum 3 D7
–D0
D15
–D8
D15
–D8
D47
–D40
D47
–D40
4
Datum 4 D7
–D0
D7
–D0
D7
–D0
D39
–D32
D39
–D32
5
Datum 5 D7
–D0
XXXX D27
–D24
D31
–D24
D31
–D24
6
Datum 6 D7
–D0
D23
–D16
D23
–D16
D23
–D16
D23
–D16
7
Datum 7 D7
–D0
D15
–D8
D15
–D8
D15
–D8
D15
–D8
8
Datum 8 D7
–D0
D7
–D0
D7
–D0
D7
–D0
D7
–D0
PEEK/POKE Control and Data Registers (0x06 and 0x07)
The PEEK/POKE Control (Table 32) and PEEK/POKE Data (Table 33) registers allow the user to access the
internal resources of TAS3208. Figure 40 shows the I2C transaction for the PEEK/POKE registers.
Table 32. PEEK/POKE Control Register (0x06)
BIT
31
30
29
28
27
26
25
24
DESCRIPTION
0
0
0
0
0
0
0
0
Unused
BIT
23
22
21
20
19
18
17
16
0
0
0
0
0
0
0
1
DSP coefficient memory load error
0
0
0
0
0
0
1
0
DSP data memory load error
0
0
0
0
0
0
1
1
DSP delay memory
0
0
0
0
0
1
0
0
M8051 internal data memory
0
0
0
0
0
1
0
1
M8051 external data memory
0
0
0
0
0
1
1
0
Extended special function registers
0
0
0
0
0
1
1
1
M8051 program memory
0
0
0
0
1
0
0
0
DSP program memory
BIT
15
14
13
12
11
10
9
8
0
0
0
0
0
0
0
0
Memory address MSB
BIT
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
Memory address LSB
Copyright
© 2007–2011, Texas Instruments Incorporated
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