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TAS3208IPZP 数据表(PDF) 60 Page - Texas Instruments |
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TAS3208IPZP 数据表(HTML) 60 Page - Texas Instruments |
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60 / 79 page  TAS3208 SLES201E – JANUARY 2007 – REVISED MARCH 2011 www.ti.com Table 20. Termination Header Block Structure(1) CALC TOTAL REGISTER BYTE DATA BLOCK FORMAT NOTE CHECKSUM NO. BYTES 1 Checksum MSB 00 2 Checksum LSB 00 3 Memory to be loaded 00 4 0x00 00 Control 0x04 5 Start memory address MSB 00 6 Start memory address LSB 00 7 Total number of byte transferred MSB 00 8 Total number of byte transferred LSB 00 (1) Shades cells indicate the values included in the checksum/total number of bytes calculation. I 2C Register Map The I2C register map for ROM advanced code is described in Table 21. Table 21. I2C Register Map(1) SUB REGISTER BYTES CONTENTS DEFAULT VALUE ADDRESS 0x00 SAP/Clock Setting 4 See SAP/Clock Setting Register 0x01 4 u(31:24), u(23:16), u(15:8), u(7)M(6:3)N(2:0) 0x00, 0x00, 0x00, 0x00 I2C M and N 0x00, 0x00, 0x00, 0x00 0x02 Status 8 See Status Register 0x00, 0x00, 0x00, 0x00 0x03 Reserved 4 u(31:24), u(23:16), u(15:8), u(7:0) 0x00, 0x00, 0x00, 0x00 0x00, 0x00, 0x00, 0x00 0x04 8 See I2C RAM Load Control Register I2C RAM Load Control 0x00, 0x00, 0x00, 0x00 0x00, 0x00, 0x00, 0x00 0x05 8 See I2C RAM Load Data Register I2C RAM Load Data 0x00, 0x00, 0x00, 0x00 0x06 PEEK/POKE Control 4 See PEEK/POKE Control Register 0x00, 0x00, 0x00, 0x00 0x00, 0x00, 0x00, 0x00 0x07 PEEK/POKE Data 8 See PEEK/POKE Data Register 0x00, 0x00, 0x00, 0x00 0x08 Silicon Version 4 ver(31:24), ver(23:16), ver(15:8), ver(7:0) 0x00, 0x00, 0x00, 0x02 0x09 Mute Control 4 See Mute Control Register 0x00, 0x00, 0x00, 0x00 0x0a Reserved 4 u(31:24), u(23:16), u(15:8), u(7:0) 0x00, 0x00, 0x00, 0x00 0x0b Reserved 4 u(31:24), u(23:16), u(15:8), u(7:0) 0x00, 0x00, 0x00, 0x00 0x0c GPIO Control 4 See GPIO Control Register 0x00, 0x00, 0x00, 0x00 0x0d Reserved 4 u(31:24), u(23:16), u(15:8), u(7:0) 0x00, 0x00, 0x00, 0x00 0x0e Reserved 4 u(31:24), u(23:16), u(15:8), u(7:0) 0x00, 0x00, 0x00, 0x00 0x0f Reserved 4 u(31:24), u(23:16), u(15:8), u(7:0) 0x00, 0x00, 0x00, 0x00 0x10 Powerdown Control 4 See Powerdown Control Register 0x00, 0x00, 0x00, 0x00 0x11 Reserved 4 u(31:24), u(23:16), u(15:8), u(7:0) 0x00, 0x00, 0x00, 0x00 0x12 A-MUX Control 4 See A-MUX Control Register 0x00, 0x00, 0x00, 0x00 0x13 Reserved 4 u(31:24), u(23:16), u(15:8), u(7:0) 0x00, 0x00, 0x00, 0x00 0x14 Reserved 4 u(31:24), u(23:16), u(15:8), u(7:0) 0x00, 0x00, 0x00, 0x00 0x15 Reserved 4 u(31:24), u(23:16), u(15:8), u(7:0) 0x00, 0x00, 0x00, 0x00 (1) Shades cells indicate common to basic and advanced modes. Unshaded cells indicate advanced mode only. 60 Submit Documentation Feedback Copyright © 2007–2011, Texas Instruments Incorporated Product Folder Link(s): TAS3208 |
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